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CHAPTER 3 REGISTERS
C (R2):
Has a loop counter function, and can be used by the DBNZ instruction.
Can be used as the register that holds the offset value in based indexed addressing.
Used as the counter in a string instruction and the SACW instruction.
Used as the MACW and MACSW instruction data pointer.
RP2:
Used to save the low-order 16 bits of the program counter (PC) when context switching is used.
RP3:
Used to save the high-order 4 bits of the program counter (PC) and the program status word (PSW) (excluding
bits 0 to 3 of PSWH) when context switching is used.
VVP (RG4):
Has a pointer function, and operates as the register that specifies the base address in register indirect addressing,
based addressing and based indexed addressing.
UUP (RG5):
Has a user stack pointer function, and enables a stack separate from the system stack to be implemented by
means of the PUSHU and POPU instructions.
Has a pointer function, and operates as the register that specifies the base address in register indirect addressing
and based addressing.
DE (RP6), HL (RP7):
Operate as the registers that specify the offset value in indexed addressing and based indexed addressing.
TDE (RG6):
Has a pointer function, and operates as the register that specifies the base address in register indirect addressing
and based addressing.
Used as the pointer in a string instruction and the SACW instruction.
WHL (RG7):
Register used mainly for 24-bit data transfers and operation processing.
Has a pointer function, and operates as the register that specifies the base address in register indirect addressing
and based addressing.
Used as the pointer in a string instruction and the SACW instruction.
In addition to the function name that emphasizes the specific function of the register (X, A, C, B, E, D, L, H, AX,
BC, VP, UP, DE, HL, VVP, UUP, TDE, WHL), each register can also be described by its absolute name (R0 to R15,
RP0 to RP7, RG4 to RG7). The correspondence between these names is shown in Table 3-2.