參數(shù)資料
型號(hào): μPD784046(A)
廠商: NEC Corp.
英文描述: 16 Bit Single Chip Microcontrollers(16 位單片微控制器)
中文描述: 16位單片機(jī)微控制器(16位單片微控制器)
文件頁(yè)數(shù): 73/90頁(yè)
文件大?。?/td> 613K
代理商: ΜPD784046(A)
μ
PD784044(A), 784046(A)
73
(3) Electrical specifications of
μ
PD784044(A2), 784046(A2) (5/6)
Serial Operation (T
A
= –40 to +125 C, V
DD
= 4.5 to 5.5 V, V
SS
= 0 V)
Parameter
Symbol
Conditions
MIN.
MAX.
Unit
Serial clock cycle time
t
CYSK
SCK1, SCK2 output
BRG
T
SFT
ns
SCK1, SCK2 input
External clock
800
ns
Serial clock low-level width
t
WSKL
SCK1, SCK2 output
BRG
0.5T
SFT
–40
ns
SCK1, SCK2 input
External clock
360
ns
Serial clock high-level width
t
WSKH
SCK1, SCK2 output
BRG
0.5T
SFT
–40
ns
SCK1, SCK2 input
External clock
360
ns
SI1, SI2 setup time
(vs. SCK1, SCK2
)
t
SSSK
80
ns
SI1, SI2 hold time
(vs. SCK1, SCK2
)
t
HSSK
80
ns
SCK1, SCK2
↓→
SO1, SO2
output delay time
t
DSBSK
R = 1 k
, C = 100 pF
0
150
ns
Remarks 1.
T
SFT
is a value set in software. The minimum value is t
CYK
×
8.
2.
t
CYK
= 1/f
CLK
(f
CLK
is internal system clock frequency)
Other Operations (T
A
= –40 to +125 C, V
DD
= 4.5 to 5.5 V, V
SS
= 0 V)
Parameter
Symbol
Conditions
MIN.
MAX.
Unit
NMI high, low-level width
t
WNIH
, t
WNIL
10
μ
s
INTP0-INTP6 high, low-level width
t
WITH
, t
WITL
4
t
CYSMP
TI2, TI3 high, low-level width
t
WTIH
, t
WTIL
4
t
CYSMP
RESET high, low-level width
t
WRSH
, t
WRSL
10
μ
s
Remarks 1.
t
CYSMP
is a sampling clock set in the noise protection control register (NPC) in software.
When NIn = 0, t
CYSMP
= t
CYK
When NIn = 1, t
CYSMP
= t
CYK
×
4
2.
t
CYK
= 1/f
CLK
(f
CLK
is internal system clock frequency)
3.
NIn: Bit n of NPC (n = 0-6)
AC Timing Test Point
V
DD
0 V
0.8 V
DD
or 2.2 V
0.8 V
0.8 V
DD
or 2.2 V
0.8 V
Test point
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