– xxiv –
22-7
22-8
Interrupt Acknowledge Processing Time ............................................................................
Macro Service Processing Time..........................................................................................
582
583
23-1
System Clock Frequency and Refresh Pulse Output Cycle When
Pseudo-static RAM is Used .................................................................................................
616
24-1
24-2
24-3
24-4
24-5
24-6
24-7
Operating States in HALT Mode .........................................................................................
HALT Mode Release and Operations after Release..........................................................
HALT Mode Release by Maskable Interrupt Request........................................................
Operating States in STOP Mode.........................................................................................
STOP Mode Release and Operations after Release .........................................................
Operating States in IDLE Mode ..........................................................................................
IDLE Mode Release and Operations after Release ...........................................................
631
632
638
639
640
645
646
25-1
25-2
Pin Statuses During Reset Input and After Reset Release ...............................................
Hardware States After Reset...............................................................................................
656
657
26-1
PROM Programming Operating Modes ..............................................................................
661
27-1
27-2
27-3
27-4
27-5
List of Instructions by 8-Bit Addressing ..............................................................................
List of Instructions by 16-Bit Addressing ............................................................................
List of Instructions by 24-Bit Addressing ............................................................................
List of Instructions by Bit Manipulation Instruction Addressing .........................................
List of Instructions by Call/Return Instruction / Branch Instruction Addressing................
700
701
702
702
703
A-1
Differences from
μ
PD784026 Subseries.............................................................................
705
LIST OF TABLES (3/3)
Table No.
Title
Page