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參數(shù)資料
| 型號： | μPD30102 |
| 廠商： | NEC Corp. |
| 英文描述： | 64-/32-BIT Microprocessor(64/32位微處理器) |
| 中文描述： | 64-/32-BIT微處理器（64/32位微處理器） |
| 文件頁數(shù)： | 8/112頁 |
| 文件大?。?/td> | 639K |
| 代理商： | ΜPD30102 |
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μ
PD30102
8
Preliminary Data Sheet
TABLE OF CONTENTS
1.
PIN FUNCTIONS ........................................................................................................................ 11
1.1
Pin Functions ....................................................................................................................................
1.2
Pin Status in Specific Status............................................................................................................
11
18
2.
INTERNAL BLOCKS.................................................................................................................. 21
2.1
V
R
4100 CPU Core ..............................................................................................................................
2.2
Clock Generator ................................................................................................................................
2.3
BCU (Bus Control Unit).....................................................................................................................
2.4
RTC (Real-time Clock) ......................................................................................................................
2.5
DSU (Deadman’s Switch Unit) .........................................................................................................
2.6
ICU (Interrupt Control Unit) ..............................................................................................................
2.7
PMU (Power Management Unit) .......................................................................................................
2.8
DMAAU (Direct Memory Access Address Unit) .............................................................................
2.9
DCU (Direct Memory Access Control Unit).....................................................................................
2.10 CMU (Clock Mask Unit) .....................................................................................................................
2.11 GIU (General Purpose I/O Unit) ........................................................................................................
2.12 AIU (Audio Interface Unit).................................................................................................................
2.13 KIU (Keyboard Interface Unit) ..........................................................................................................
2.14 PIU (Touch Panel Interface Unit) .....................................................................................................
2.15 DSIU (Debug Serial Interface Unit) ..................................................................................................
2.16 SIU (Serial Interface Unit) .................................................................................................................
2.17 FIR (Fast IrDA Unit) ...........................................................................................................................
2.18 HSP (Host Signal Processing Unit) .................................................................................................
2.19 LED (LED Unit) ..................................................................................................................................
21
21
21
21
22
22
22
22
22
22
22
22
22
22
22
22
23
23
23
3.
INTERNAL ARCHITECTURE .................................................................................................... 24
3.1
Pipeline ..............................................................................................................................................
3.2
CPU Registers ...................................................................................................................................
3.3
Outline of Instruction Set .................................................................................................................
3.4
System Control Coprocessor (CP0) ................................................................................................
3.4.1
CP0 registers ......................................................................................................................... 28
3.5
Data Format and Addressing ...........................................................................................................
3.6
Virtual Storage...................................................................................................................................
3.6.1
Virtual address space ........................................................................................................... 31
3.6.2
Address translation .............................................................................................................. 34
3.7
Physical Address Space...................................................................................................................
3.7.1
ROM address space.............................................................................................................. 37
3.7.2
Internal I/O space .................................................................................................................. 38
3.7.3
DRAM address space ........................................................................................................... 39
3.8
Cache .................................................................................................................................................
3.9
Exception Processing.......................................................................................................................
24
25
26
28
30
31
36
40
41
4.
INITIALIZATION INTERFACE.................................................................................................... 44
4.1
Reset Function ..................................................................................................................................
44
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