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| 型號： | ZPSD602(V)E1 |
| 英文描述： | Field Programmable Microcontroller Peripherals with Embedded Micro--Cell(可編程邏輯，零功耗，4K位SRAM,26個可編程I/O,通用PLD有63個輸入) |
| 中文描述： | 現(xiàn)場可編程微控制器外圍設(shè)備和嵌入式微-細(xì)胞（可編程邏輯，零功耗，4K的位的SRAM，26余個可編程輸入/輸出，通用PLD的有63個輸入） |
| 文件頁數(shù)： | 2/98頁 |
| 文件大?。?/td> | 484K |
| 代理商： | ZPSD602(V)E1 |
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ZPSD6XX(V) Family
12-2
General
Information
J
Twenty six individually configurable I/O Port pins. The Ports may be used as MCU I/Os,
PLD I/Os, latched MCU address outputs or special function I/Os. Fifteen I/O port pins
can be configured as open drain outputs.
J
Internal EPROM in densities of 256 Kbit, 512 Kbit and 1 Mbit, configurable in eight
or sixteen-bit widths. The EPROM is divided into eight equal-size blocks, accessible
by user-specified addresses. The access time includes address latching and PLD
decoding. The EPROM includes a low power option.
J
Internal 4 Kbit SRAM can be configured in eight or sixteen-bit data widths. The SRAM
retains data if power is lost by automatically switching to standby power.
J
A page register expands the microcontroller address space by a factor of sixteen.
J
A security bit prevents copying the ZPSD6XX(V) configuration and ZPLD logic as well
as the EPROM contents.
J
ZPSD6XXV(V) devices (2.7V to 5.5V operation) are specifically designed for low
voltage and low power applications.
J
The programmable Power Management Unit (PMU) supports two separate, low-power
modes allowing operations with as little as 10 μA (at 5V V
CC
). The device can
automatically detect a lack of microcontroller activity and put the PSD into power down
mode.
J
The devices are available in EPROM versions. The ceramic package is ideal for
prototyping and low-volume production, and in OTP versions for high-volume, low-cost
applications.
J
Package choices include 52 pin plastic chip carrier (J), ceramic chip carrier (L), and
plastic quad flat pack (U).
J
ZPSD6XX(V) family development is supported by the WSI’s PC based PSDsoft
design system. The software is MS-Windows
and Windows 95 compatible. The suite
includes PSDabel
(ABEL
), to specify the ZPLD logic, and an efficient fitter. The tool
also includes the PSDsilosIII simulator from SIMUCAD
. The MagicPro
III programmer
is an engineering development tool and can program any PSD device.
Key Features
(cont.)
The ZPSD6XX(V) series of Field Programmable Microcontroller Peripherals combine an
innovative architecture with advanced technology to provide a user-programmable,
high-performance, low-power solution to microcontroller system design. The embedded
input and output Micro
Cells enable efficient implementation of user defined logic
functions that require both software and hardware interaction. The devices eliminate the
need for discrete ‘glue’ logic and allow the development of entire systems using only a few
highly integrated devices.
Portable and battery powered systems have recently become major embedded control
application segments. As a result, the demand for electronic components having extremely
low power consumption has increased dramatically. Recognizing this need, WSI, Inc. has
developed a new ZPSD (Zero Power PSD) technology. ZPSD products virtually eliminate
the DC component of power consumption reducing it to standby levels. Eliminating the DC
component is the basis for the words “Zero Power” in the ZPSD name. ZPSD products also
minimize the AC power component when the chip is changing states. The result is a
programmable microcontroller peripheral family that replaces at least six discrete circuit
functions while drawing much less power than a single EPROM.
ZPSD
Background
Please refer to the revision block at
the end of this document for updated
information.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ZPSD601(V)E1 | Field Programmable Microcontroller Peripherals with Embedded Micro--Cell(可編程邏輯，零功耗，4K位SRAM,26個可編程I/O,通用PLD有63個輸入) |
| ZPSD603(V)E1 | Field Programmable Microcontroller Peripherals with Embedded Micro--Cell(可編程邏輯，零功耗，4K位SRAM,26個可編程I/O,通用PLD有63個輸入) |
| ZPSD611(V)E1 | Field Programmable Microcontroller Peripherals with Embedded Micro--Cell(可編程邏輯，零功耗，4K位SRAM,26個可編程I/O,通用PLD有63個輸入) |
| ZPSD612(V)E1 | Field Programmable Microcontroller Peripherals with Embedded Micro--Cell(可編程邏輯，零功耗，4K位SRAM,26個可編程I/O,通用PLD有63個輸入) |
| ZPSD613(V)E1 | Field Programmable Microcontroller Peripherals with Embedded Micro--Cell(可編程邏輯，零功耗，4K位SRAM,26個可編程I/O,通用PLD有63個輸入) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ZPSD611E1-15J | 制造商:WSI 功能描述: |
| ZPSD611E1-15JI | 制造商:WSI 功能描述: |
| ZPSD611E1-15L | 制造商:WSI 功能描述: |
| ZPSD611E1-70L | 制造商:WSI 功能描述: |
| ZPSD611E1-90JI | 制造商:WSI 功能描述: |
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