參數(shù)資料
型號: ZPSD411A2
英文描述: Field Programmable Microcontroller Peripherals(可編程邏輯,零功耗,16K位SRAM,40個可編程I/O,通用PLD有59個輸入)
中文描述: 現(xiàn)場可編程微控制器外圍設備(可編程邏輯,零功耗,16K的位的SRAM,40余個可編程輸入/輸出,通用PLD的有59個輸入)
文件頁數(shù): 49/108頁
文件大?。?/td> 626K
代理商: ZPSD411A2
ZPSD4XX Famly
5-49
I/OPorts
(Cont.)
Address Out
For microcontrollers with a multiplexed address/data bus, the I/O ports in Address-Out
mode are able to provide latched address outputs (A0 – A15) to external devices. This
mode of operation requires the user to:
J
Configuration
1.Declare the pins used as address line outputs in the ABEL file (PSDsoft).
2.Write “0” to the corresponding bit in the Control Register associated with each
I/O port.
3.Set the Direction Register to Output Mode.
Address In
There are two Address In modes:
1. For Port A - as other address line (A2-A7 and A16-A23) inputs to the DPLD. Additional
address inputs included in the EPROM decoding must come from Port A. The address
inputs are latched internally by ALE/AS if Multiplexed Bus is specified in PSDsoft.
2. For Ports C and D – as address inputs to the ZPLD for general decoding,
should not be used in EPROM decoding.
J
Configuration
1.Declare pins or signals used as Address In in the ABEL file (PSDsoft).
2.Write latch equations in the .ABL file, e.g., A16.LE = ALE.
3.Include latched address in logic equations.
Data Port
In this mode, the port is acting as a data bus port for a microcontroller which has a
non-multiplexed address/data bus. The Data Port is connected to the data bus of the
microcontroller and the ADIO port is connected to the address bus.
J
Configuration
Select the non-multiplexed bus option in PSD configuration (PSDsoft).
Alternate Function In
This mode is per-pin configurable and enables the user to define pin PE7 of Port E as
Automatic Power Down (APD) CLK input.
J
Configuration
1.Select input functions in PSD configuration.
2.PSD Compiler assigns pins for the selected options.
相關(guān)PDF資料
PDF描述
ZPSD413A2 Field Programmable Microcontroller Peripherals(可編程邏輯,零功耗,16K位SRAM,40個可編程I/O,通用PLD有59個輸入)
ZPSD502B1 Field Programmable Microcontroller Peripherals(可編程邏輯,零功耗,16K位SRAM,40個可編程I/O,通用PLD有61個輸入)
ZPSD502B1V Field Programmable Microcontroller Peripherals(可編程邏輯,零功耗,16K位SRAM,40個可編程I/O,通用PLD有61個輸入)
ZPSD512B1 Field Programmable Microcontroller Peripherals(可編程邏輯,零功耗,16K位SRAM,40個可編程I/O,通用PLD有61個輸入)
ZPSD512B1V Field Programmable Microcontroller Peripherals(可編程邏輯,零功耗,16K位SRAM,40個可編程I/O,通用PLD有61個輸入)
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ZPSD411A2-12J 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral
ZPSD411A2-12JI 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral
ZPSD411A2-12LI 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral
ZPSD411A2-12U 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral
ZPSD411A2-12UI 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral