參數(shù)資料
型號(hào)： ZPSD304RV
英文描述： Field Programmable Microcontroller Peripherals(可編程邏輯,零功耗，無(wú)SRAM,19個(gè)可編程I/O,通用PLD有16個(gè)輸入)
中文描述： 現(xiàn)場(chǎng)可編程微控制器外圍設(shè)備（可編程邏輯，零功耗，無(wú)的SRAM，19余個(gè)可編程輸入/輸出，通用PLD的有16個(gè)輸入）
文件頁(yè)數(shù)： 18/90頁(yè)
文件大?。?/td> 491K
代理商： ZPSD304RV
ZPSD3XX Famly
3-18
Configuration
Bits
CDATA
(Note 15)
No.
of Bits
Function
8-bit or 16-bit Data Bus Width
CDATA = 0 eight bits
CDATA = 1 sixteen bits
ADDRESS/DATA Multiplexed (separate buses)
CADDRDAT = 0, non-multiplexed
CADDRDAT = 1, multiplexed
A19 or CSI
CA19/CSI = 0, enable power-down
CA19/CSI = 1, enable A19 input to PAD
Active HIGH or Active LOW
CALE = 0, Active high
CALE = 1, Active low
Active high or active low
CRESET = 0, active low reset signal
CRESET = 1, active high reset signal
Combined or Separate Address Space
for SRAM and EPROM
0 = Combined, 1 = Separate
Port A I/Os or A0–A7
CPAF1 = 0, Port A pin = I/O
CPAF1 = 1, Port A pin = A0 – A7
Port A AD0–AD7 (address/data multiplexed bus)
CPAF2 = 0, address or I/O on Port A (according to CPAF1)
CPAF2 = 1, address/data multiplexed on Port A (track mode)
A16–A19 address or logic inputs
CATD = 0, logic inputs
CATD = 1, address inputs
A16–A19 Transparent or Latched
CADDHLT = 0, Address latch transparent
CADDHLT = 1, Address latched (ALE dependent)
SECURITY On/Off
CSECURITY = 0, off
CSECURITY = 1, on
A0–A15 Address Inputs are transparent or
ALE-dependent in non-multiplexed modes
CLOT = 0, transparent
CLOT = 1, ALE-dependent
Determine the polarity and control methods of read and
write cycles.
CEDS
CRRWR
0
0
RD and WR active low pulses
0
1
R/W status and high E pulse
1
1
R/W status and low DS pulse
CRRWR = 0, RD and WR active low strobes
CRRWR = 1, R/W status and E active high pulse
Port A CMOS or Open Drain Output
CPACOD = 0, CMOS output
CPACOD = 1, open-drain output
Port B is I/O or CS0– CS7
CPBF = 0, Port B pin is CS0 – CS7
CPBF = 1, Port B pin is I/O
1
CADDRDAT
1
CA19/CSI
1
CALE
1
CRESET
(Note 17a)
1
COMB/SEP
1
CPAF1
8
CPAF2
1
CATD
(Note 17)
1
CADDHLT
1
CSECURITY
1
CLOT
(Note 16)
1
CRRWR
CEDS
(Note 16)
2
CRRWR
(Note 17)
1
CPACOD
8
CPBF
8
Table 5.
ZPSD3XX
Configuration
Bits
13,14
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