參數(shù)資料
型號(hào): ZPSD211R
英文描述: Field Programmable Microcontroller Peripherals(可編程邏輯,可加密,零功耗,12個(gè)可單獨(dú)配置I/O)
中文描述: 現(xiàn)場(chǎng)可編程微控制器外圍設(shè)備(可編程邏輯,可加密,零功耗,12個(gè)可單獨(dú)配置的I / O)
文件頁數(shù): 19/32頁
文件大?。?/td> 149K
代理商: ZPSD211R
PSD211R
19
Signal
Configuration Mode
Condition
AD0/A0–AD7/A7
All
Input
A8–A15
All
Input
I/O
Address outputs A0–A7
Unchanged
All 1’s
PA0–PA7
I/O
CS0–CS7 CMOS outputs
Unchanged
All 1’s
PB0–PB7
PC0–PC2
Address inputs A18–A16
CS8–CS10 CMOS outputs
Input
All 1’s
Control Signals
(Cont.)
Table 9. Signal States During Power-Down Mode
Component
Signals
Contents
CS0–CS10
All 1’s (deselected)
PAD
CSIOPORT, ES0–ES7
All 0’s (deselected)
Data register A
Direction register A
Data register B
Direction register B
n/a
n/a
n/a
n/a
All
unchanged
Table 10. Internal States During Power-Down
A19/CSI
When configured as CSI, a high on this pin deselects, and powers down, the chip.
A low on this pin puts the chip in normal operational mode. For PSD211R states during the
power-down mode, see Tables 9 and 10, and Figure 9.
In A19 mode, the pin is an additional input to the PAD. It can be used as an address line
(CADLOG3 = 1) or as a general-purpose logic input (CADLOG3 = 0). A19 can be
configured as ALE dependent or as transparent input. In this mode, the chip is always
enabled.
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