PSD211R
16
The PSD211R control signals are WR/V
PP
or R/W, RD/E, ALE or AS, PSEN, RESET,
and A19/CSI. Each of these signals can be configured to meet the output control signal
requirements of various microcontrollers.
WR/V
PP
or R/W
In operational mode, this signal can be configured as WR or R/W. As WR, all write
operations are activated by an active low signal on this pin. As R/W, the pin operates with
the E strobe of the RD/E pin. When R/W is high, an active high signal on the RD/E pin
performs a read operation. When R/W is low, an active high signal on the RD/E pin
performs a write operation.
RD/E
In operational mode, this signal can be configured as RD or E. As RD, all read operations
are activated by an active low signal on this pin. As E, the pin operates with the R/W
signal of the WR/V
PP
or R/W pin. When R/W is high, an active high signal on the RD/E pin
performs a read operation. When R/W is low, an active high signal on the RD/E pin
performs a write operation.
ALE or AS
ALE polarity is programmable. When programmed to be active high, a high on the pin
causes the input address latches, Port A address latches, Port C, and A19 address latches
to be transparent. The falling edge of ALE locks the information into the latches. When ALE
is programmed to be active low, a low on the pin causes the input address latches, Port A
address latches, Port C, and A19 address latches to be transparent. The rising edge of ALE
locks the appropriate information into the latches.
PSEN
The PSEN function enables the user to work with two address spaces: program memory
and data memory (if COMB/SEP = 1). In this mode, an active low signal on the PSEN pin
causes the EPROM to be read if selected. The I/O port read operation is done by RD low
(CRRWR = 0), or by E high and R/W high (CRRWR = 1, CEDS = 0).
Whenever a member of the 8031 family (or any other similar microcontroller) is used, the
PSEN pin must be connected to the PSEN pin of the microcontroller.
If COMB/SEP = 0, the address spaces of the program and the data are combined. In this
configuration (except for the 8031-type case mentioned above), the PSEN pin must be tied
high to V
CC
, and the EPROM and I/O ports are read by RD low (CRRWR = 0), or by E high
and R/W high (CRRWR = 1, CEDS = 0). See Figures 7 and 8.
Control Signals