
Z90T366 ROM and Z90T361 OTP
eZVision 64 KWord Television Controller with OSD
PS005901-1100
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List of Figures
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Block Diagram.............................................................................................. 3
52-Pin SDIP Pinout...................................................................................... 4
Code Development Environment................................................................. 7
AR Register Format ...................................................................................12
RAM, ROM, and Pointer Architecture ........................................................14
ROM Map ...................................................................................................15
RAM Allocation ..........................................................................................16
Clock Switching Block Diagram (8 -16 MHz) .............................................17
32 KHz Oscillator Recommended Circuit ...................................................17
Bidirectional Port Pins ................................................................................21
Bidirectional Pins Multiplexed with I2C Port ...............................................21
Bidirectional Pins Multiplexed with ADC Inputs .........................................22
IR Capture Register Block Diagram ...........................................................23
Z90T361/6 ADC Block Diagram .................................................................25
ADC Data Packing .....................................................................................26
Master Mode ..............................................................................................30
Slave Mode ................................................................................................31
Data Flow ..................................................................................................33
Blank and R, G, B Outputs in Digital Mode ................................................33
R, G, and B Outputs in Analog (Palette) Mode ..........................................34
Character Expansion .................................................................................35
Table Settings ............................................................................................37
Cursor ........................................................................................................39
Programmable Palette Control at AR Register ..........................................43
IR Capture Register Input ..........................................................................44
Loop Filter Pin Configuration .....................................................................44
Pipeline Execution .....................................................................................97
System Block Diagram .............................................................................170
Recommended Application Schematics ..................................................175
52-Pin SDIP Package Dimensions ..........................................................176