![](http://datasheet.mmic.net.cn/Exar-Corporation/XRT81L27IV-F_datasheet_100146/XRT81L27IV-F_7.png)
á
XRT81L27
SEVEN CHANNEL E1 LINE INTERFACE UNIT WITH CLOCK RECOVERY
REV. 1.1.0
5
43
TClk_6
I
Transmitter 6 Clock Input: E1 rate at 2.048MHz ± 50ppm.
44
TPOS_6/
TDATA_6
I
Transmitter 6 Positive Data/ NRZ Input: (see pin 38)
45
TNEG_6/
CODE_6
I-L
Transmitter 6 Negative Data Input: (see pin 39)
46
TAOS_6
I-L
Transmit All Ones Channel_6: (see pin 40)
47
SDO
LBM
O
I
Serial Data Output: (Host Mode)
This pin is the Serial Data Output port for the Microprocessor Serial
Interface access.
Loop-back Mode: (Hardware Mode)
When this pin is tied "High", Analog Local loop-back is selected.
Connect this pin "Low" to select remote loop-back. Digital Local loop-
back is not supported in Hardware Mode.
48
SDI
B1
I
Serial Data Input Port:
Host Mode, this pin is the serial data input port (see Figure 5). Hardware Mode, B1, together with B2 (pin 49) and B3 (pin 50) are con-
trol bits used to select which one of the seven channels to be placed in
Loop-back mode. Analog or Remote Loop-back is determined by LBM
(pin 47).
49
SClk
B2
I
Microprocessor Serial Interface Clock:
Host Mode, this clock signal is used to clock SDI/SDO for the Serial
Interface.
Hardware Mode, B2, together with B1 and B3 are control bits to select
which of the seven channels to be placed in Loop-back mode.(see pin 48
description)
50
CS
B3
I
Chip Select Input:
Host Mode, this pin must be asserted "Low" in order to enable commu-
nication with the device via the Serial Interface.
Hardware Mode, B3, together with B1 and B2 are control bits to select
which of the seven channels to be placed in Loop-back mode. (see pin
48 description)
51
TAOS_5
I-L
Transmit All Ones Channel_5: (see pin 40)
PIN DESCRIPTIONS
NOTE: I -H indicates an input pin with a 50k
pull-up Resistor, I-L indicates an input pin with a 50k pull-down resistor.
PIN #NAME
TYPE
DESCRIPTION
Loop-back Channel Control
B1
B2
B3
Chan. #
000
0
001
1
010
2
011
3
100
4
101
5
110
6
111
All