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參數(shù)資料
| 型號： | XRT81L27IV-F |
| 廠商： | Exar Corporation |
| 文件頁數(shù)： | 20/30頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC LIU EI 7CH 3.3V 128TQFP |
| 標準包裝： | 72 |
| 應用： | DECT |
| 接口： | 串行 |
| 電源電壓： | 3.3V |
| 封裝/外殼： | 128-LQFP |
| 供應商設備封裝： | 128-TQFP（14x20） |
| 包裝： | 托盤 |
| 安裝類型： | 表面貼裝 |
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XRT81L27
SEVEN CHANNEL E1 LINE INTERFACE UNIT WITH CLOCK RECOVERY
REV. 1.1.0
25
3.2
CAPACITIVE-COUPLING THE RECEIVER TO THE
LINE
Figure 15 presents a recommended method to use
when capacitive-coupling the Receive Section to the
line.
3.3
THE RECEIVE EQUALIZER BOCK
After a given Channel (within the XRT81L27) has re-
ceived the incoming line signal, via the RTIP_n
(where _n is the channel number) and RRING_n in-
put pins, the first block that this signal will pass
through is the Receive Equalizer block.
As the line signal is transmitted from a given Trans-
mitting terminal, the pulse shapes (at that location)
are basically square. Hence, these pulses consist of a
combination of low and high frequency Fourier com-
ponents. As this line signal travels from the transmit-
ting terminal (via the coaxial cable or twisted pair) to
the receiving terminal, it will be subjected to frequen-
cy-dependent loss. The higher frequency compo-
nents of the signal will be subjected to a greater
amount of attenuation than the lower frequency com-
ponents. If this line signal travels over reasonably
long cable lengths, then the original square shape of
the pulses will be distorted and with inter-symbol in-
terference increases.
The purpose of this block is to equalize the incoming
distorted signal, due to cable loss. In essence, the
Receive Equalizer block accomplishes this by sub-
jecting the received line signal to frequency-depen-
dent amplification (which attempts to counter the fre-
quency-dependent loss that the line signal has expe-
rienced). By doing this, the Receive Equalizer is at-
tempting to restore the shape of the line signal so that
the received data can be recovered reliably.
FIGURE 15. CAPACITIVE - COUPLED RECEIVE SECTIONS OF THE XRT81L27 TO THE LINE (FOR BALANCED 120
APPLICATIONS)
30.1
30.1
120
Balanced
Input
60.4
C1
C2
0.1uF
RTIP1
RRing1
RPOS1
RNEG1
RLOS1
RClk1
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