參數(shù)資料
型號： XRT73LC00IV
廠商： EXAR CORP
元件分類： 數(shù)字傳輸電路
英文描述： E3/DS3/STS-1 LINE INTERFACE UNIT
中文描述： DATACOM, PCM TRANSCEIVER, PQFP44
封裝： 10 X 10 MM, 1.40 MM HEIGHT, TQFP-44
文件頁數(shù)： 47/53頁
文件大小： 604K
代理商： XRT73LC00IV
á
XRT73L00
E3/DS3/STS-1 LINE INTERFACE UNIT
REV. 1.2.0
44
5.0
THE MICROPROCESSOR SERIAL INTER-
FACE
The on-chip Command Registers of the XRT73L00
DS3/E3/STS-1 Line Interface Unit IC are accessed to
configure the XRT73L00 into a variety of modes. This
section describes the Command Registers and how
to use the Microprocessor Serial Interface.
5.1
D
ESCRIPTION
OF
THE
C
OMMAND
R
EGISTERS
A listing of these Command Registers, their Address-
es and their Bit-Formats are listed in Table 5.
Address:
The register addresses are in
Hexadecimal
format.
Type:
The Command Registers are either Read-Only (RO)
or Read/Write (R/W) registers.
N
OTES
:
1. The default value for each of the bit-fields in these
registers is “0”.
2. If the REGRESET input pin is asserted, then the
contents of the command registers is reset to all
"0's" resulting in the XRT73L00 operating in the
mode corresponding to the default values of the
Command Registers.
DESCRIPTION OF BIT-FIELDS FOR EACH COM-
MAND REGISTER
5.1.1
Command Register - CR0
Bit D4 - RLOL (Receive Loss of Lock Status)
This Read-Only bit-field reflects the lock status of the
Clock Recovery Phase-Locked-Loop in the
XRT73L00.
This bit-field is set to “0” if the Clock Recovery PLL is
in lock with the incoming line signal. This bit-field is
set to “1” if the Clock Recovery PLL is out of lock with
the incoming line signal.
Bit D3 - RLOS (Receive Loss of Signal Status)
This Read-Only bit-field indicates whether or not the
Receiver in the XRT73L00 is currently declaring an
LOS (Loss of Signal) Condition.
This bit-field is set to “0” if the XRT73L00 is not cur-
rently declaring the LOS Condition. This bit-field is
set to “1” if the XRT73L00 is declaring an LOS Condi-
tion.
T
ABLE
5: A
DDRESSES
AND
B
IT
F
ORMATS
OF
XRT73L00 C
OMMAND
R
EGISTERS
A
DDRESS
C
OMMAND
R
EGISTER
T
YPE
R
EGISTER
B
IT
-F
ORMAT
D4
D3
D2
D1
D0
0x00
CR0
RO
RLOL
RLOS
ALOS
DLOS
DMO
0x01
CR1
R/W
TXOFF
TAOS
TXCLKINV
TXLEV
TXBIN
0x02
CR2
R/W
Reserved
ENDECDIS
ALOSDIS
DLOSDIS
REQDIS
0x03
CR3
R/W
RNRZ
LOSMUT
RCLK2/LCV
RCLK2INV
RCLK1INV
0x04
CR4
R/W
Reserved
STS-1/DS3
E3
LLB
RLB
0x05
CR5
R/W
Reserved
Reserved
Reserved
Reserved
Reserved
0x06
CR6
R/W
Reserved
Reserved
Reserved
Reserved
Reserved
0x07
CR7
R/W
Reserved
Reserved
Reserved
Reserved
Reserved
0x08
CR8
R/W
Reserved
Reserved
Reserved
Reserved
Reserved
0x09
CR9
R/W
Reserved
Reserved
Reserved
Reserved
Reserved
0x10
CR10
R/W
Reserved
Reserved
Reserved
Reserved
Reserved
0x11
CR11
R/W
Reserved
Reserved
Reserved
Reserved
Reserved
0x12
CR12
R/W
Reserved
Reserved
Reserved
Reserved
Reserved
0x13
CR13
R/W
Reserved
Reserved
Reserved
Reserved
Reserved
0x14
CR14
R/W
Reserved
Reserved
Reserved
Reserved
Reserved
0x15
CR15
R/W
Reserved
Reserved
Reserved
Reserved
Reserved
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