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參數(shù)資料
| 型號(hào)： | XRT73L03IV |
| 廠商： | EXAR CORP |
| 元件分類： | 數(shù)字傳輸電路 |
| 英文描述： | 3 CHANNEL E3/DS3/STS-1 LINE INTERFCE UNIT |
| 中文描述： | DATACOM, PCM TRANSCEIVER, PQFP120 |
| 封裝： | 14 X 20 MM, HEAT SINK, TQFP-120 |
| 文件頁數(shù)： | 7/53頁 |
| 文件大小： | 604K |
| 代理商： | XRT73L03IV |
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XRT73L00
E3/DS3/STS-1 LINE INTERFACE UNIT
REV. 1.2.0
4
10
RxAVDD
****
Receive Analog Power Supply
11
REGRESET/
(RCLK2INV)
I
Register Reset Input pin (Invert RCLK2 Output - Select):
The function of this pin depends upon whether the XRT73L00 is operating in the
HOST Mode or in the Hardware Mode.
HOST Mode - Register Reset Input pin:
Setting this input pin “Low” causes the XRT73L00 to reset the contents of the
Command Registers to their default settings and operating configuration. This
pin is internally pulled “High”.
Hardware Mode - Invert RCLK2 Output Select:
Setting this input pin “Low” configures the Receive Section of the XRT73L00 to
output the recovered data via the RPOS and RNEG output pins on the rising
edge of the RCLK2 output signal.
Setting this input pin “High” configures the Receive Section to output the recov-
ered data on the falling edge of the RCLK2 output signal.
12
REQDIS
I
Receive Equalization Disable Input:
Setting this input pin “High” disables the Internal Receive Equalizer in the
XRT73L00. Setting this pin “Low” enables the Internal Receive Equalizer. The
guidelines for enabling and disabling the Receive Equalizer are described in
Section 3.2.
N
OTES
:
1. This input pin is ignored if the XRT73L00 is operating in the HOST
Mode.
2. Tie this pin to GND if the XRT73L00 is going to be operating in the
HOST Mode.
13
LOSTHR
I
Loss of Signal Threshold Control:
This input pin is used to select the LOS (Loss of Signal) Declaration and Clear-
ance thresholds for the Analog LOS Detector circuit. Two settings are provided
by forcing this signal to either GND or VDD.
N
OTE
:
This pin is only applicable during DS3 or STS-1 operations.
14
LLB
I
Local Loop-Back Select:
This input pin along with RLB dictates which Loop-Back mode the XRT73L00 is
operating in.
A “High” on this pin with RLB being set to “Low” configures the XRT73L00 to
operate in the Analog Local Loop-Back Mode.
A “High” on this pin with RLB also being set to “High” configures the XRT73L00
to operate in the Digital Local Loop-Back Mode.
N
OTES
:
1. This input pin is ignored if the XRT73L00 is operating in the HOST
Mode.
2. Tie this pin to GND if the XRT73L00 is going to be operating in the
HOST Mode.
PIN DESCRIPTION
P
IN
#
S
YMBOL
T
YPE
D
ESCRIPTION
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| XRT73LC00 | E3/DS3/STS-1 LINE INTERFACE UNIT |
| XRT73LC00IV | E3/DS3/STS-1 LINE INTERFACE UNIT |
| XRT73L00 | E3/DS3/STS-1 LINE INTERFACE UNIT |
| XRT73L00A | E3/DS3/STS-1 LINE INTERFACE UNIT |
| XRT73L00AIV | E3/DS3/STS-1 LINE INTERFACE UNIT |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XRT73L03IVS | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Telecommunication IC |
| XRT73L04A | 制造商:EXAR 制造商全稱:EXAR 功能描述:4 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT |
| XRT73L04AIV | 制造商:EXAR 制造商全稱:EXAR 功能描述:4 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT |
| XRT73L04B | 制造商:EXAR 制造商全稱:EXAR 功能描述:4 CHANNEL DS3/E3/STS-1 LINE INTERFACE UNIT |
| XRT73L04BES | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
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