參數(shù)資料
型號(hào)： XRT73L00A
廠商： Exar Corporation
英文描述： E3/DS3/STS-1 LINE INTERFACE UNIT
中文描述： E3/DS3/STS-1線路接口單元
文件頁(yè)數(shù)： 28/53頁(yè)
文件大?。?/td> 604K
代理商： XRT73L00A
XRT73L00
E3/DS3/STS-1 LINE INTERFACE UNIT
REV. 1.2.0
á
25
Figure 14 illustrates the HDB3 Encoder at work with
two separate strings of four (or more) consecutive ze-
ros.
2.3.3
Encoder
The XRT73L00 allows two methods to enable or dis-
able the HDB3/B3ZS Encoder.
If the XRT73L00 is operating in the Hardware
Mode.
To enable the HDB3/B3ZS Encoder, set the ENDEC-
DIS input pin (pin 21) to “0”. To disable the HDB3/
B3ZS Encoder, set the ENDECDIS input pin (pin 21)
to “1”.
If the XRT73L00 is operating in the HOST Mode.
To enable the HDB3/B3ZS Encoder, set the ENDEC-
DIS bit-field in Command Register (CR2) to “0”.
Enabling/Disabling the HDB3/B3ZS
To disable the HDB3/B3ZS Encoder, set the ENDEC-
DIS bit-field in Command Register (CR2) to “1”.
If either of these two methods is employed to disable
the HDB3/B3ZS Encoder, the LIU transmits the data
onto the line as it is received via the TPDATA and
TNDATA input pins.
2.4
T
HE
T
RANSMIT
P
ULSE
S
HAPER
C
IRCUITRY
The Transmit Pulse Shaper Circuitry consists of a
Transmit Line Build-Out circuit which can be enabled
or disabled by setting the TXLEV input pin or bit-field
to “High” or “Low”. The purpose of the Transmit Line
Build-Out circuit is to permit configuring of the
XRT73L00 to transmit an output pulse which is com-
pliant to either of the following Bellcore pulse tem-
plate requirements when measured at the Digital
Cross Connect System. Each of these Bellcore spec-
ifications further state that the cable length between
the Transmit Output and the Digital Cross Connect
system can range anywhere from 0 to 450 feet.
The Isolated DSX-3 Pulse Template Requirement per
Bellcore GR-499-CORE is illustrated in Figure 7.
The Isolated STSX-1 Pulse Template Requirement
per Bellcore GR-253-CORE is illustrated in Figure 8.
2.4.1
Enabling the Transmit Line Build-Out Cir-
cuit
If the Transmit Line Build-Out Circuit is enabled, the
XRT73L00 outputs shaped pulses onto the line via
the TTIP and TRING output pins.
Do the following to enable the Transmit Line Build-Out
circuit in the XRT73L00:
If the XRT73L00 is operating in the Hardware
Mode, set theTXLEV input pin (pin 1) to “Low”
If the XRT73L00 is operating in the HOST Mode,
set the TXLEV bit-field to “0” as illustrated below.
2.4.2
cuit
Disabling the Transmit Line Build-Out Cir-
F
IGURE
14. A
N
E
XAMPLE
OF
HDB3 E
NCODING
Data
TPDATA
TNDATA
1 0 1 1 0 0 0 0 0 1 1 1 1 0 1 1 0 1 1 0 0 1 1 0 0 0 0 1
0 0 0 V
Line Signal
B 0 0 V
TCLK
COMMAND REGISTER CR2 (ADDRESS = 0X02)
D4
D3
D2
D1
D0
Reserved ENDECDIS ALOSDIS DLOSDIS REQDIS
X
0
X
X
X
COMMAND REGISTER CR1 (ADDRESS = 0X01)
D4
D3
D2
D1
D0
TXOFF
TAOS
TXCLKINV
TXLEV
TXBIN
0
X
X
0
X
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