REV. 1.2.2 34 5.3.3 Receiver Operation with FIFO 5.4 Automatic Hardware (RTS/C" />
參數(shù)資料
型號(hào)： XR17D158CV-F
廠商： Exar Corporation
文件頁數(shù)： 28/73頁
文件大小： 0K
描述： IC UART PCI BUS OCTAL 144LQFP
產(chǎn)品培訓(xùn)模塊： UART Product Overview
標(biāo)準(zhǔn)包裝： 60
特點(diǎn)： *
通道數(shù)： 8
FIFO's： 64 字節(jié)
規(guī)程： RS485
電源電壓： 3.3V，5V
帶自動(dòng)流量控制功能： 是
帶IrDA 編碼器/解碼器： 是
帶故障啟動(dòng)位檢測功能： 是
帶調(diào)制解調(diào)器控制功能： 是
安裝類型： 表面貼裝
封裝/外殼： 144-LQFP
供應(yīng)商設(shè)備封裝： 144-LQFP（20x20）
包裝： 托盤
其它名稱： 1016-1291
XR17D158
xr
UNIVERSAL (3.3V AND 5V) PCI BUS OCTAL UART
REV. 1.2.2
34
5.3.3
Receiver Operation with FIFO
5.4
Automatic Hardware (RTS/CTS or DTR/DSR) Flow Control Operation
Automatic hardware RTS/CTS or DTR/DSR flow control is used to prevent data overrun to the local receiver
FIFO and remote receiver FIFO. The RTS#/DTR# output pin is used to request the remote unit to suspend/
restart data transmission while the CTS#/DSR# input pin is monitored to suspend/restart the local transmitter.
The auto RTS/CTS or DTR/DSR flow control features are individually selected to fit specific application
requirement and enabled through EFR bit-6 and 7 and MCR bit-2 for either RTS/CTS or DTR/DSR control
signals.
Auto RTS flow control must be started by asserting the RTS# output pin LOW (MCR bit-1 = 1). Similarly, Auto
DTR flow control must be started by asserting the DTR# output pin LOW (MCR bit-0 = 1). Figure 16 shows in
detail how automatic hardware flow control works.
FIGURE 15. RECEIVER OPERATION IN FIFO AND FLOW CONTROL MODE
TABLE 11: AUTO RTS/CTS OR DTR/DSR FLOW CONTROL SELECTION
MCR BIT-2
EFR BIT-7
EFR BIT-6
HARDWARE FLOW CONTROL SELECTION
0
1
X
Auto CTS Flow Control Enabled
0
X
1
Auto RTS Flow Control Enabled
1
X
Auto DSR Flow Control Enabled
1
X
1
Auto DTR Flow Control Enabled
X
0
No Hardware Flow Control
Receive Data Shift
Register (RSR)
RXFIFO1
16X or 8X Sampling
Clock (8XMODE Reg.)
E
rror
Fl
ag
s
(64-s
ets)
E
rro
rFl
ags
i
n
LS
R
bi
ts
4:2
64 bytes by 11-
bit wide FIFO
Receive Data Characters
FIFO Trigger=48
Example:
- FIFO trigger level set at 48 bytes
- RTS/DTR hyasteresis set at +/-8 chars.
Data fills to 56
Data falls to 40
Data Bit
Validation
Receive Data
FIFO
(64-byte)
Receive
Data
Receive Data
Byte and Errors
RHR Interrupt (ISR bit-2) is programmed
at FIFO trigger level (RXTRG).
FIFO is Enable by FCR bit-0=1
RTS#/DTR# de-asserts when data fills above
the trigger level to suspend remote transmitter.
Enable by EFR bit-6=1, MCR bit-2.
RTS#/DTR# re-asserts when data falls below
the trigger level to restart remote transmitter.
Enable by EFR bit-6=1, MCR bit-2.
相關(guān)PDF資料
PDF描述
ATMEGA168-15MZ MCU AVR 16K FLASH 15MHZ 32-QFN
XR17V258IVTR-F IC UART PCI BUS OCTAL 144LQFP
XR16L788IQTR-F IC UART FIFO 64B OCTAL 100QFP
XR17C154IV-F IC UART PCI BUS QUAD 144LQFP
XR17C154CV-F IC UART PCI BUS QUAD 144LQFP
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
XR17D158CV-F-SIWI 制造商:Exar Corporation 功能描述:FOR WILLIAMS GAMING THEIR CM'S 制造商:EXAR 功能描述:XR17D158CV-F-SIWI 制造商:EXAR 功能描述:FOR WILLIAMS GAMING THEIR CM'S
XR17D158CVTR-F 制造商:Exar Corporation 功能描述:UART 8-CH 64Byte FIFO 5V 144-Pin LQFP T/R 制造商:Exar Corporation 功能描述:XR17D158CVTR-F
XR17D158IV 功能描述:UART 接口集成電路 UART RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
XR17D158IV-F 功能描述:UART 接口集成電路 3.3V-5V 64B FIFO temp -45 to 85C;UART RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
XR17D158IVTR-F 制造商:Exar Corporation 功能描述:UART 8-CH 64Byte FIFO 5V 144-Pin LQFP T/R 制造商:Exar Corporation 功能描述:XR17D158IVTR-F
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購

我的聯(lián)系方式

*
*
*