REV. 1.0.1 1.62V TO 3.63V UART WITH 64-BYTE FIFO AND VLIO INTERFACE IER[3]: Modem Status Interrupt Enable " />
參數(shù)資料
型號： XR16M781IB25-0C-EB
廠商： Exar Corporation
文件頁數(shù)： 20/52頁
文件大?。?/td> 0K
描述： EVAL BOARD FOR XR16M781-C 25BGA
標(biāo)準(zhǔn)包裝： 1
系列： *
XR16M781
27
REV. 1.0.1
1.62V TO 3.63V UART WITH 64-BYTE FIFO AND VLIO INTERFACE
IER[3]: Modem Status Interrupt Enable
Logic 0 = Disable the modem status register interrupt (default).
Logic 1 = Enable the modem status register interrupt.
IER[4]: Sleep Mode Enable (requires EFR[4] = 1)
Logic 0 = Disable Sleep Mode (default).
Logic 1 = Enable Sleep Mode. See Sleep Mode section for further details.
IER[5]: Xoff Interrupt Enable (requires EFR[4]=1)
Logic 0 = Disable the software flow control, receive Xoff interrupt. (default)
Logic 1 = Enable the software flow control, receive Xoff interrupt. See Software Flow Control section for
details.
IER[6]: RTS# Output Interrupt Enable (requires EFR[4]=1)
Logic 0 = Disable the RTS# interrupt (default).
Logic 1 = Enable the RTS# interrupt. The UART issues an interrupt when the RTS# pin makes a transition
from LOW to HIGH (if enabled by EFR bit-6).
IER[7]: CTS# Input Interrupt Enable (requires EFR[4]=1)
Logic 0 = Disable the CTS# interrupt (default).
Logic 1 = Enable the CTS# interrupt. The UART issues an interrupt when CTS# pin makes a transition from
LOW to HIGH (if enabled by EFR bit-7).
4.4
Interrupt Status Register (ISR) - Read-Only
The UART provides multiple levels of prioritized interrupts to minimize external software interaction. The
Interrupt Status Register (ISR) provides the user with six interrupt status bits. Performing a read cycle on the
ISR will give the user the current highest pending interrupt level to be serviced, others are queued up to be
serviced next. No other interrupts are acknowledged until the pending interrupt is serviced. The Interrupt
Source Table, Table 8, shows the data values (bit 0-5) for the interrupt priority levels and the interrupt sources
associated with each of these interrupt levels.
4.4.1
Interrupt Generation:
LSR is by any of the LSR bits 1, 2, 3 and 4.
RXRDY is by RX trigger level.
RXRDY Time-out is by a 4-char plus 12 bits delay timer.
TXRDY is by TX trigger level or TX FIFO empty.
MSR is by any of the MSR bits 0, 1, 2 and 3.
Receive Xon/Xoff/Special character is by detection of a Xon, Xoff or Special character.
CTS# is when the remote transmitter toggles the input pin (from LOW to HIGH) during auto CTS flow control.
RTS# is when its receiver toggles the output pin (from LOW to HIGH) during auto RTS flow control.
Wakeup interrupt is generated when the M781 wakes up from the sleep mode.
相關(guān)PDF資料
PDF描述
AYM06DRMD CONN EDGECARD 12POS .156 WW
D-500-L455-1-612-120 MICROCOUPLER 1 STUB SHIELD CABLE
ECE-T1HA183EA CAP ALUM 18000UF 50V 20% SNAP
ECE-T1VA273EA CAP ALUM 27000UF 35V 20% SNAP
AGM06DRMD CONN EDGECARD 12POS .156 WW
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
XR16M781IB25-F 功能描述:UART 接口集成電路 1.62-3.63V; 64-Byte FIFO & VLIO; UART RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
XR16M781IL24 制造商:EXAR 制造商全稱:EXAR 功能描述:1.62V TO 3.63V UART WITH 64-BYTE FIFO AND VLIO INTERFACE
XR16M781IL24-0C-EB 功能描述:界面開發(fā)工具 Eval Board for XR16M781IL24 Series RoHS:否 制造商:Bourns 產(chǎn)品:Evaluation Boards 類型:RS-485 工具用于評估:ADM3485E 接口類型:RS-485 工作電源電壓:3.3 V
XR16M781IL24-F 功能描述:UART 接口集成電路 1.62-3.63V; 64-Byte FIFO & VLIO; UART RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
XR16M781IL32 制造商:EXAR 制造商全稱:EXAR 功能描述:1.62V TO 3.63V UART WITH 64-BYTE FIFO AND VLIO INTERFACE
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報(bào)價(jià)

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*