參數(shù)資料
型號(hào)： XR16M698IQ100-F
廠商： Exar Corporation
文件頁數(shù)： 1/58頁
文件大?。?/td> 0K
描述： IC UART FIFO 32B OCTAL 100QFP
標(biāo)準(zhǔn)包裝： 66
特點(diǎn)： *
通道數(shù)： 8
FIFO's： 32 字節(jié)
規(guī)程： RS485
電源電壓： 1.62 V ~ 3.63 V
帶自動(dòng)流量控制功能： 是
帶IrDA 編碼器/解碼器： 是
帶故障啟動(dòng)位檢測(cè)功能： 是
帶調(diào)制解調(diào)器控制功能： 是
安裝類型： 表面貼裝
封裝/外殼： 100-BQFP
供應(yīng)商設(shè)備封裝： 100-QFP（14x20）
包裝： 托盤
Exar Corporation 48720 Kato Road, Fremont CA, 94538 (510) 668-7000 FAX (510) 668-7017 www.exar.com
XR16M698
1.62V TO 3.63V HIGH PERFORMANCE OCTAL UART WITH 32-BYTE FIFO
MAY 2008
REV. 1.0.0
GENERAL DESCRIPTION
The XR16M6981 (698), is a 1.62V to 3.63V octal
Universal Asynchronous Receiver and Transmitter
(UART). The highly integrated device is designed for
high bandwidth requirement in communication
systems. The global interrupt source register
provides a complete interrupt status indication for all
8 channels to speed up interrupt parsing. Each UART
has its own 16C550 compatible set of configuration
registers, TX and RX FIFOs of 32 bytes, fully
programmable transmit and receive FIFO trigger
levels, automatic RTS/CTS or DTR/DSR hardware
flow control with programmable hysteresis, automatic
software (Xon/Xoff) flow control, RS-485 half-duplex
direction control with programmable turn-around
delay, Intel or Motorola bus interface and sleep mode
with a wake-up indicator.
NOTE: Covered by US patents #5,649,122 and #5,949,787
APPLICATIONS
Remote Access Servers
Ethernet Network to Serial Ports
Network Management
Factory Automation and Process Control
Point-of-Sale Systems
Multi-port RS-232/RS-422/RS-485 Cards
FEATURES
1.62V to 3.63V supply voltage
Single Interrupt output for all 8 UARTs
A Global Interrupt Source Register for all 8 UARTs
5G “Flat” UART Registers for easier programming
Simultaneous Initialization of all UART channels
General Purpose 16-bit Timer/counter
Sleep Mode with Wake-up Indication
Highly Integrated Device for Space Saving
Each UART is independently controlled with:
■ 16C550 Compatible 5G Register Set
■ 32-byte Transmit and Receive FIFOs
■ Fractional Baud Rate Generator
■ Programmable TX and RX FIFO Trigger Level
■ Automatic RTS/CTS or DTR/DSR Flow Control
■ Automatic Xon/Xoff Software Flow Control
■ RS-485 Half-Duplex Direction Control Output
with Selectable Turn-around Delay
■ Infrared (IrDA 1.0) Data Encoder/Decoder
■ Programmable Data Rate with Prescaler
Up to 15 Mbps Serial Data Rate
Pin compatible to XR16V698, XR16V598,
XR16V798 and XR16M598
FIGURE 1. BLOCK DIAGRAM
TMRCK
Device
Configuration
Registers
XTAL1
XTAL2
Crystal Osc/Buffer
UART Channel 0
TX0, RX0, DTR0#,
DSR0#, RTS0#,
CTS0#, CD0#, RI0#
Data Bus
Interface
RST#
A7:A0
IOR#
IOW#
CS#
INT#
TX7, RX7, DTR7#,
DSR7#, RTS7#,
CTS7#, CD7#, RI7#
UART Channel 7
UART Channel 6
UART Channel 5
UART Channel 4
UART Channel 3
UART Channel 2
UART Channel 1
16-bit
Timer/Counter
32 Byte TX FIFO
32 Byte RX FIFO
BRG
IR
ENDEC
TX & RX
UART
Regs
D7:D0
16/68#
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