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參數(shù)資料
| 型號： | XR16L2551IL-F |
| 廠商： | Exar Corporation |
| 文件頁數(shù)： | 23/49頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC UART FIFO 16B DUAL 32QFN |
| 標(biāo)準(zhǔn)包裝： | 490 |
| 特點： | * |
| 通道數(shù)： | 2，DUART |
| FIFO's： | 16 字節(jié) |
| 規(guī)程： | RS232，RS485 |
| 電源電壓： | 2.25 V ~ 5.5 V |
| 帶自動流量控制功能： | 是 |
| 帶IrDA 編碼器/解碼器： | 是 |
| 帶故障啟動位檢測功能： | 是 |
| 帶調(diào)制解調(diào)器控制功能： | 是 |
| 帶CMOS： | 是 |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 32-VFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 32-QFN 裸露焊盤（5x5） |
| 包裝： | 托盤 |
| 其它名稱： | 1016-1450 XR16L2551IL-F-ND |
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XR16L2551
3
REV. 1.1.3
LOW VOLTAGE DUART WITH POWERSAVE
PIN DESCRIPTIONS
Pin Description
NAME
32-QFN
PIN #
48-TQFP
PIN #
TYPE
DESCRIPTION
DATA BUS INTERFACE
A2
A1
A0
18
19
20
26
27
28
I
Address data lines [2:0]. These 3 address lines select one of the inter-
nal registers in UART channel A/B during a data bus transaction.
D7
D6
D5
D4
D3
D2
D1
D0
2
1
32
31
30
29
28
27
3
2
1
48
47
46
45
44
IO
Data bus lines [7:0] (bidirectional).
IOR#
(VCC)
14
19
I
When 16/68# pin is at logic 1, the Intel bus interface is selected and
this input becomes read strobe (active low). The falling edge instigates
an internal read cycle and retrieves the data byte from an internal regis-
ter pointed by the address lines [A2:A0], puts the data byte on the data
bus to allow the host processor to read it on the rising edge.
When 16/68# pin is at logic 0, the Motorola bus interface is selected
and this input is not used and should be connected to VCC.
IOW#
(R/W#)
12
15
I
When 16/68# pin is at logic 1, it selects Intel bus interface and this input
becomes write strobe (active low). The falling edge instigates the inter-
nal write cycle and the rising edge transfers the data byte on the data
bus to an internal register pointed by the address lines.
When 16/68# pin is at logic 0, the Motorola bus interface is selected
and this input becomes read (logic 1) and write (logic 0) signal.
CSA#
(CS#)
7
10
I
When 16/68# pin is at logic 1, this input is chip select A (active low) to
enable channel A in the device.
When 16/68# pin is at logic 0, this input becomes the chip select (active
low) for the Motorola bus interface.
CSB#
(A3)
8
11
I
When 16/68# pin is at logic 1, this input is chip select B (active low) to
enable channel B in the device.
When 16/68# pin is at logic 0, this input becomes address line A3
which is used for channel selection in the Motorola bus interface. Input
logic 0 selects channel A and logic 1 selects channel B.
INTA
(IRQ#)
22
30
O
When 16/68# pin is at logic 1 for Intel bus interface, this output
becomes channel A interrupt output. The output state is defined by the
user through the software setting of MCR[3]. INTA is set to the active
mode and OP2A# output to a logic 0 when MCR[3] is set to a logic 1.
INTA is set to the three state mode and OP2A# to a logic 1 when
MCR[3] is set to a logic 0. See MCR[3].
When 16/68# pin is at logic 0 for Motorola bus interface, this output
becomes device interrupt output (active low, open drain). An external
pull-up resistor is required for proper operation.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XR16L2551ILTR-F | 功能描述:UART 接口集成電路 UART RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| XR16L2551IM | 制造商:EXAR 制造商全稱:EXAR 功能描述:LOW VOLTAGE DUART WITH POWERSAVE |
| XR16L2551IM-0A-EB | 功能描述:UART 接口集成電路 Supports L2551 48 ld TQFP, ISA Interface RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| XR16L2551IM-0B-EB | 功能描述:UART 接口集成電路 Supports L2551 48 ld TQFP, PCI Interface RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| XR16L2551IM-F | 功能描述:UART 接口集成電路 UART RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
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