參數(shù)資料
型號(hào)： XR16C850IQ
英文描述： UART|CMOS|QFP|52PIN|PLASTIC
中文描述： 異步|的CMOS | QFP封裝| 52PIN |塑料
文件頁(yè)數(shù)： 7/49頁(yè)
文件大?。?/td> 690K
代理商： XR16C850IQ
á
XR16C854/XR16C854D
3.3V AND 5V QUAD UART WITH 128-BYTE FIFO
REV. 2.0
7
FSRS#
-
-
76
I
FIFO Status Register Select (active low, input with internal pull-up).
The content of the FSTAT register is placed on the data bus when this
pin becomes active. However it should be noted, D0-D3 contain the
inverted logic states of TXRDY# A-D pins, and D4-D7 the logic states
(un-inverted) of RXRDY# A-D pins. Address line is not required when
reading this status register.
MODEM OR SERIAL I/O INTERFACE
TXA
TXB
TXC
TXD
41
8
10
39
17
19
51
53
14
16
65
67
O
UART channels A-D Transmit Data and infrared transmit data. Stan-
dard transmit and receive interface is enabled when MCR[6] = 0. In
this mode, the TX signal will be a logic 1 during reset, or idle (no
data). Infrared IrDA transmit and receive interface is enabled when
MCR[6] = 1. In the Infrared mode, the inactive state (no data) for the
Infrared encoder/decoder interface is a logic 0.
IRTXA
IRTXB
IRTXC
IRTXD
-
-
-
-
-
-
-
-
6
24
57
75
O
UART channel A-D Infrared Transmit Data. The inactive state (no
data) for the Infrared encoder/decoder interface is a logic 0. Regard-
less of the logic state of MCR bit-6, this pin will be operating in the
Infrared mode. Caution, this pin is a logic 1 after power up and prior
to initialization.
RXA
RXB
RXC
RXD
62
20
29
51
7
29
41
63
97
34
47
85
I
UART channel A-D Receive Data or infrared receive data. Normal
receive data input must idle at logic 1 condition. The infrared receiver
pulses typically idles at logic 0 but can be inverted by software con-
trol prior going in to the decoder, see FCTR[2].
RTSA#
RTSB#
RTSC#
RTSD#
5
13
36
44
14
22
48
56
11
19
62
70
O
UART channels A-D Request-to-Send (active low) or general pur-
pose output. This output must be asserted prior to using auto RTS
flow control, see EFR[6], MCR[1], FCTR[1:0], EMSR[5:4] and IER[6].
Also see Figure 11. If these outputs are not used, leave them uncon-
nected.
UART channels A-D Clear-to-Send (active low) or general purpose
input. It can be used for auto CTS flow control, see EFR[7], and
IER[7]. Also see Figure 11. These inputs should be connected to
VCC when not used.
UART channels A-D Data-Terminal-Ready (active low) or general
purpose output. If these outputs are not used, leave them uncon-
nected.
CTSA#
CTSB#
CTSC#
CTSD#
DTRA#
DTRB#
DTRC#
DTRD#
DSRA#
DSRB#
DSRC#
DSRD#
CDA#
CDB#
CDC#
CDD#
RIA#
RIB#
RIC#
RID#
2
16
33
47
3
15
34
46
1
17
32
48
64
18
31
49
63
19
30
50
11
25
45
59
12
24
46
58
10
26
44
60
9
27
43
61
8
28
42
62
8
22
59
73
9
21
60
72
7
23
58
74
99
32
49
83
98
33
48
84
I
O
I
UART channels A-D Data-Set-Ready (active low) or general purpose
input. This input should be connected to VCC when not used. This
input has no effect on the UART.
I
UART channels A-D Carrier-Detect (active low) or general purpose
input. This input should be connected to VCC when not used. This
input has no effect on the UART.
I
UART channels A-D Ring-Indicator (active low) or general purpose
input. This input should be connected to VCC when not used. This
input has no effect on the UART.
ANCILLARY SIGNALS
XTAL1
25
35
40
I
Crystal or external clock input.
Pin Description
N
AME
64-TQFP
P
IN
#
68-PLCC
P
IN
#
100-QFP
P
IN
#
T
YPE
D
ESCRIPTION
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
XR16C854 制造商:EXAR 制造商全稱:EXAR 功能描述:并轉(zhuǎn)串4串口擴(kuò)展芯片
XR16C854CJ 制造商:Rochester Electronics LLC 功能描述: 制造商:Exar Corporation 功能描述:
XR16C854CJ-0A-EVB 功能描述:UART 接口集成電路 Supports C854 68 ld PLCC, ISA Interface RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
XR16C854CJ-F 功能描述:UART 接口集成電路 UART RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
XR16C854CJTR-F 制造商:Exar Corporation 功能描述:XR16C854CJTR-F
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