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參數(shù)資料
| 型號： | XCF32PVG |
| 廠商： | Xilinx, Inc. |
| 英文描述： | Platform Flash In-System Programmable Configuration PROMS |
| 中文描述： | 平臺Flash在系統(tǒng)可編程配置方案管理系統(tǒng) |
| 文件頁數(shù)： | 4/46頁 |
| 文件大?。?/td> | 525K |
| 代理商： | XCF32PVG |
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Platform Flash In-System Programmable Configuration PROMS
DS123 (v2.9) May 09, 2006
www.xilinx.com
4
R
Programming
In-System Programming
In-System Programmable PROMs can be programmed
individually, or two or more can be daisy-chained together
and programmed in-system via the standard 4-pin JTAG
protocol as shown in
Figure 3
. In-system programming
offers quick and efficient design iterations and eliminates
unnecessary package handling or socketing of devices. The
programming data sequence is delivered to the device
using either Xilinx iMPACT software and a Xilinx download
cable, a third-party JTAG development system, a
JTAG-compatible board tester, or a simple microprocessor
interface that emulates the JTAG instruction sequence. The
iMPACT software also outputs serial vector format (SVF)
files for use with any tools that accept SVF format, including
automatic test equipment. During in-system programming,
the CEO output is driven High. All other outputs are held in
a high-impedance state or held at clamp levels during
in-system programming. In-system programming is fully
supported across the recommended operating voltage and
temperature ranges.
OE/RESET
The 1/2/4 Mbit XCFxxS Platform Flash PROMs in-system
programming algorithm results in issuance of an internal
device reset that causes OE/RESET to pulse Low.
External Programming
Xilinx reprogrammable PROMs can also be programmed by
the Xilinx MultiPRO Desktop Tool or a third-party device
programmer. This provides the added flexibility of using
pre-programmed devices with an in-system programmable
option for future enhancements and design changes.
XC3S1200E
XC3S1600E
Spartan-3L
XC3S1000L
XC3S1500L
XC3S5000L
Spartan-3
XC3S50
XC3S200
XC3S400
XC3S1000
XC3S1500
XC3S2000
XC3S4000
XC3S5000
Spartan-IIE
XC2S50E
XC2S100E
XC2S150E
XC2S200E
XC2S300E
XC2S400E
XC2S600E
Spartan-II
XC2S15
XC2S30
XC2S50
XC2S100
XC2S150
XC2S200
3,832,320
5,957,760
XCF04S
XCF08P
3,223,488
5,214,784
13,271,936
XCF04S
XCF08P
XCF16P
439,264
1,047,616
1,699,136
3,223,488
5,214,784
7,673,024
11,316,864
13,271,936
XCF01S
XCF01S
XCF02S
XCF04S
XCF08P
XCF08P
XCF16P
XCF16P
630,048
863,840
1,134,496
1,442,016
1,875,648
2,693,440
3,961,632
XCF01S
XCF01S
XCF02S
XCF02S
XCF02S
XCF04S
XCF04S
197,696
336,768
559,200
781,216
1,040,096
1,335,840
XCF01S
XCF01S
XCF01S
XCF01S
XCF01S
XCF02S
Notes:
1.
If design revisioning or other advanced feature support is
required, the XCFxxP can be used as an alternative to the
XCF01S, XCF02S, or XCF04S.
Assumes compression used.
The largest possible Virtex-II bitstream sizes are specified. Refer
to the Virtex-II User Guide for information on bitgen options
which affect bitstream size.
2.
3.
Table 3:
Platform Flash PROM Capacity
Platform
Flash PROM
Configuration
Bits
Platform
Flash PROM
Configuration
Bits
XCF01S
1,048,576 XCF08P
8,388,608
XCF02S
2,097,152 XCF16P
16,777,216
XCF04S
4,194,304 XCF32P
33,554,432
Table 2:
Xilinx FPGAs and Compatible Platform Flash
PROMs
(Continued)
Configuration
Bitstream
FPGA
Platform Flash PROM
(1)
Figure 3:
JTAG In-System Programming Operation
(a) Solder Device to PCB
(b) Program Using Download Cable
DS026_02_082703
GND
V
CC
(a)
(b)
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