參數(shù)資料
型號(hào)： XCF32PFSG48C
廠商： XILINX INC
元件分類： DRAM
英文描述： Platform Flash In-System Programmable Configuration PROMS
中文描述： 32M X 1 CONFIGURATION MEMORY, PBGA48
封裝： LEAD-FREE, PLASTIC, TFBGA-48
文件頁(yè)數(shù)： 29/46頁(yè)
文件大小： 525K
代理商： XCF32PFSG48C
Platform Flash In-System Programmable Configuration PROMS
DS123 (v2.9) May 09, 2006
www.xilinx.com
29
R
T
HRV
REV_SEL hold time from CF, CE or OE/RESET
when V
CCO
= 3.3V or 2.5V
(8)
–
–
300
–
ns
REV_SEL hold time from CF, CE or OE/RESET
when V
CCO
= 1.8V
(8)
–
–
300
–
ns
Notes:
1.
2.
3.
4.
5.
6.
AC test load = 50 pF for XCF01S/XCF02S/XCF04S; 30 pF for XCF08P/XCF16P/XCF32P.
Float delays are measured with 5 pF AC loads. Transition is measured at ±200 mV from steady-state active levels.
All AC parameters are measured with V
IL
= 0.0V and V
IH
= 3.0V.
If T
HCE
High < 2
μ
s, T
CE
= 2
μ
s.
If T
HOE
Low < 2
μ
s, T
OE
= 2
μ
s.
This is the minimum possible T
CYC
. Actual T
CYC
= T
CAC
+ FPGA Data setup time. Example: With the XCF32P in serial mode with V
CCO
at
3.3V, if FPGA data setup time = 15 ns, then the actual T
CYC
= 25 ns +15 ns = 40 ns.
Guaranteed by design; not tested.
CF, EN_EXT_SEL, REV_SEL[1:0], and BUSY are inputs for the XCFxxP PROM only.
When JTAG CONFIG command is issued, PROM will drive CF Low for at least the T
HCF
minimum.
7.
8.
9.
Symbol
Description
XCF01S, XCF02S,
XCF04S
XCF08P, XCF16P,
XCF32P
Units
Min
Max
Min
Max
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