參數(shù)資料
型號: XCF16PFG48
廠商: Xilinx, Inc.
英文描述: Platform Flash In-System Programmable Configuration PROMS
中文描述: 平臺Flash在系統(tǒng)可編程配置方案管理系統(tǒng)
文件頁數(shù): 23/46頁
文件大?。?/td> 525K
代理商: XCF16PFG48
Platform Flash In-System Programmable Configuration PROMS
DS123 (v2.9) May 09, 2006
www.xilinx.com
23
R
pull-up resistor is used, but refer to the appropriate FPGA
data sheet for the recommended DONE pin pull-up value. If
the DONE circuit is connected to an LED to indicate FPGA
configuration is complete, and is also connected to the
PROM CE pin to enable low-power standby mode, then an
external buffer should be used to drive the LED circuit to
ensure valid transitions on the PROM’s CE pin. If low-power
standby mode is not required for the PROM, then the CE pin
should be connected to ground.
Table 11:
Truth Table for XCFxxS PROM Control Inputs
Control Inputs
Internal Address
Outputs
OE/RESET
CE
DATA
CEO
ICC
High
Low
If address
<
TC
(2)
: increment
Active
High
Active
If address
=
TC
(2)
: don't change
High-Z
Low
Reduced
Low
Low
Held reset
High-Z
High
Active
X
(1)
High
Held reset
High-Z
High
Standby
Notes:
1.
2.
X = don’t care.
TC = Terminal Count = highest address value.
Table 12:
Truth Table for XCFxxP PROM Control Inputs
Control Inputs
Internal Address
Outputs
OE/RESET
CE
CF
BUSY
(5)
DATA
CEO
CLKOUT
ICC
High
Low
High
Low
If address
<
TC
(2)
and
address
<
EA
(3)
: increment
Active
High
Active
Active
If address
<
TC
(2)
and
address
=
EA
(3)
: don't change
High-Z
High
High-Z
Reduced
Else
If address
=
TC
(2)
: don't change
High-Z
Low
High-Z
Reduced
High
Low
High
High
Unchanged
Active and
Unchanged
High
Active
Active
High
Low
X
(1)
Reset
(4)
Active
High
Active
Active
Low
Low
X
X
Held reset
(4)
High-Z
High
High-Z
Active
X
High
X
X
Held reset
(4)
High-Z
High
High-Z
Standby
Notes:
1.
2.
3.
4.
X = don’t care.
TC = Terminal Count = highest address value.
For the XCFxxP with Design Revisioning enabled, EA = end address (last address in the selected design revision).
For the XCFxxP with Design Revisioning enabled, Reset = address reset to the beginning address of the selected bank. If Design
Revisioning is not enabled, then Reset = address reset to address 0.
The BUSY input is only enabled when the XCFxxP is programmed for parallel data output and decompression is not enabled.
5.
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