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參數(shù)資料
| 型號： | XCF08PVOG48 |
| 廠商： | Xilinx, Inc. |
| 英文描述： | Platform Flash In-System Programmable Configuration PROMS |
| 中文描述： | 平臺(tái)Flash在系統(tǒng)可編程配置方案管理系統(tǒng) |
| 文件頁數(shù)： | 35/46頁 |
| 文件大小： | 525K |
| 代理商： | XCF08PVOG48 |
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Platform Flash In-System Programmable Configuration PROMS
DS123 (v2.9) May 09, 2006
www.xilinx.com
35
R
F
S
CLKOUT alternate (slower) frequency
(10)
12.5
25
MHz
CLKOUT alternate (slower) frequency with decompression
(11)
6
12.5
MHz
Notes:
1.
2.
3.
4.
5.
6.
7.
AC test load = 50 pF for XCF01S/XCF02S/XCF04S; 30 pF for XCF08P/XCF16P/XCF32P.
Float delays are measured with 5 pF AC loads. Transition is measured at ±200 mV from steady-state active levels.
Guaranteed by design, not tested.
All AC parameters are measured with V
IL
= 0.0V and V
IH
= 3.0V.
If T
HCE
High < 2
μ
s, T
CE
= 2
μ
s.
If T
HOE
Low < 2
μ
s, T
OE
= 2
μ
s.
The delay before the enabled CLKOUT signal begins clocking data out of the device is dependent on the clocking configuration. The delay
before CLKOUT is enabled will increase if decompression is enabled.
Slower CLK frequency option may be required to meet the FPGA data sheet setup time.
Typical CLKOUT default (fast) period = 25 ns (40 MHz)
10. Typical CLKOUT alternate (slower) period = 50 ns (20 MHz)
11. When decompression is enabled, the CLKOUT signal becomes a controlled clock output. When decompressed data is available, CLKOUT
will toggle at the source clock frequency (either the selected internal clock frequency or the external CLK input frequency). When
decompressed data is not available, the CLKOUT pin is parked High. If CLKOUT is used, then it must be pulled High externally using a 4.7k
Ω
pull-up to V
CCO
.
12. When JTAG CONFIG command is issued, PROM will drive CF Low for at least the T
HCF
minimum.
8.
9.
Symbol
Description
XCF08P, XCF16P,
XCF32P
Units
Min
Max
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| XCF08PVOG48C | Platform Flash In-System Programmable Configuration PROMS |
| XCF16P | Platform Flash In-System Programmable Configuration PROMS |
| XCF16PF48 | Platform Flash In-System Programmable Configuration PROMS |
| XCF16PFG48 | Platform Flash In-System Programmable Configuration PROMS |
| XCF16PFS48C | Platform Flash In-System Programmable Configuration PROMS |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XCF08PVOG48C | 功能描述:IC PROM SRL 1.8V 8M GATE 48TSOP RoHS:是 類別:集成電路 (IC) >> 存儲(chǔ)器 - 用于 FPGA 的配置 Proms 系列:- 產(chǎn)品變化通告:Product Discontinuation 28/Jul/2010 標(biāo)準(zhǔn)包裝:98 系列:- 可編程類型:OTP 存儲(chǔ)容量:300kb 電源電壓:3 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 封裝/外殼:8-SOIC（0.154"，3.90mm 寬） 供應(yīng)商設(shè)備封裝:8-TSOP 包裝:管件 |
| XCF08PVOG48C0936 | 制造商:Xilinx 功能描述:XLXXCF08PVOG48C0936 PROM |
| XCF10 | 制造商:Johnson Electric / Parlex Corporation 功能描述: 制造商:Johnson Electric / Saia-Burgess 功能描述:Catalogue / XCF10 制造商:SAIA - BURGESS ELECTRONICS INC. 功能描述:Catalogue / XCF10 |
| XCF10-81-J1Z1 | 制造商:SAIA - BURGESS ELECTRONICS INC. 功能描述:Catalogue / XCF10-81-J1Z1 |
| XCF10-J1 | 制造商:SAIA - BURGESS ELECTRONICS INC. 功能描述:Catalogue / XCF10-J1 |
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