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參數(shù)資料
| 型號： | XCF08PFS48C |
| 廠商： | XILINX INC |
| 元件分類： | DRAM |
| 英文描述： | Platform Flash In-System Programmable Configuration PROMS |
| 中文描述： | 8M X 1 CONFIGURATION MEMORY, PBGA48 |
| 封裝： | PLASTIC, TFBGA-48 |
| 文件頁數(shù)： | 45/46頁 |
| 文件大小： | 525K |
| 代理商： | XCF08PFS48C |
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Platform Flash In-System Programmable Configuration PROMS
DS123 (v2.9) May 09, 2006
www.xilinx.com
45
R
07/20/04
2.4
Added Pb-free package options VOG20, FSG48, and VOG48.
Figure 6, page 14
, and
Figure 7, page 15
: Corrected connection name for FPGA DOUT
(OPTIONAL Daisy-chained Slave FPGAs with different configurations) from DOUT to DIN.
Section
"Absolute Maximum Ratings," page 24
: Removed parameter T
SOL
from table. (T
SOL
information can be found in
Package User Guide
.)
Table 2, page 3
: Removed reference to XC2VP125 FPGA.
10/18/04
2.5
Table 1, page 1
: Broke out V
CCO
/ V
CCJ
into two separate columns.
Table 9, page 7
: Added clarification of ID code die revision bits.
Table 10, page 8
: Deleted T
CKMIN2
(bypass mode) and renamed T
CKMIN1
to T
CKMIN
.
Table
"Recommended Operating Conditions," page 25
: Separated V
CCO
and V
CCJ
parameters.
Table
"DC Characteristics Over Operating Conditions," page 26
:
Added most parameter values for XCF08P, XCF16P, XCF32P devices.
Added Footnote (1) to I
CCO
specifying no-load conditions.
Table
"AC Characteristics Over Operating Conditions," page 27
:
Added most parameter values for XCF08P, XCF16P, XCF32P devices.
Expanded Footnote (1) to include XCF08P, XCF16P, XCF32P devices.
Added Footnote (8) through (11) relating to CLKOUT conditions for various parameters.
Added rows to T
CYC
specifying parameters for parallel mode.
Added rows specifying parameters with decompression for T
CLKO
, T
COH
, T
FF
, T
SF
.
Added T
DDC
(setup time with decompression).
Table
"AC Characteristics Over Operating Conditions When Cascading," page 36
:
Added most parameter values for XCF08P, XCF16P, XCF32P devices.
Separated Footnote (5) into Footnotes (5) and (6) to specify different derivations of T
,
depending on whether dual-purpose configuration pins persist as configuration pins, or
become general I/O pins after configuration.
03/14/05
2.6
Added Virtex-4 LX/FX/SX configuration data to
Table 2
.
Corrected Virtex-II configuration data in
Table 2
.
Corrected Virtex-II Pro configuration data in
Table 2
.
Added Spartan-3L configuration data to
Table 2
.
Added Spartan-3E configuration data to
Table 2
.
Paragraph added to
FPGA Master SelectMAP (Parallel) Mode (1)
,
Page 11
.
Changes to DC Characteristics
T
OER
changed,
Page 26
.
I
OL
changed for V
OL
,
Page 26
.
V
CCO
added to test conditions for I
IL
, I
ILP
, I
IHP
,and II
H
,
Page 26
. Values modified for I
ILP
and
I
IHP.
Changes to AC Characteristics
T
LC
and T
HC
modified for 1.8V,
Page 31
.
New rows added for T
CEC
and T
OEC
,
Page 30
.
Minor changes to grammar and punctuation.
Added explanation of "Preliminary" to DC and AC Electrical Characteristics.
07/11/05
2.7
Move from "Preliminary" to "Product Specification"
Corrections to Virtex-4 configuration bitstream values
Minor changes to
Figure 7, page 15
,
Figure 12, page 20
,
Figure 13, page 21
, and
Figure 16,
page 41
Change to
"Internal Oscillator," page 8
description
Change to
"CLKOUT," page 8
description
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| XCF08PFS48C0936 | 制造商:Xilinx 功能描述:MEMORY |
| XCF08PFS48CESB | 制造商:Xilinx 功能描述: |
| XCF08PFSG48C | 功能描述:IC PROM SRL 1.8V 8M GATE 48CSBGA RoHS:是 類別:集成電路 (IC) >> 存儲器 - 用于 FPGA 的配置 Proms 系列:- 產(chǎn)品變化通告:Product Discontinuation 28/Jul/2010 標準包裝:98 系列:- 可編程類型:OTP 存儲容量:300kb 電源電壓:3 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 封裝/外殼:8-SOIC（0.154"，3.90mm 寬） 供應商設備封裝:8-TSOP 包裝:管件 |
| XCF08PFSG48C4039 | 制造商:Xilinx 功能描述: |
| XCF08PV | 制造商:XILINX 制造商全稱:XILINX 功能描述:Platform Flash In-System Programmable Configuration PROMS |
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