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參數(shù)資料
| 型號： | XC95108 |
| 廠商： | Xilinx, Inc. |
| 英文描述： | In-System Programmable CPLD(在系統(tǒng)復(fù)雜可編程邏輯器件) |
| 中文描述： | 在系統(tǒng)可編程的CPLD（在系統(tǒng)復(fù)雜可編程邏輯器件） |
| 文件頁數(shù)： | 2/8頁 |
| 文件大?。?/td> | 74K |
| 代理商： | XC95108 |
Designing with XC9500 CPLDs
2-20
XAPP073 January, 1998 (Version 1.3)
The FastCONNECT Switch Matrix
The FastCONNECT switch matrix attaches high speed sig-
nals to the function blocks. It also connects every macrocell
output to the function blocks through a fully populated
cross-point switch. This high degree of connectibility is a
key factor that allows the designer to make design changes
even after a device is mounted on a PC board.
Function Blocks
The function blocks, shown in
Figure 2
, are groups of 18
macrocells. Each FB has 90 product terms which can be
assigned to any of the 18 macrocells. This provides opti-
mum logic flexibility within the function block and supports
pin-locked designs. The highest possible performance is
attained by the software assigning a uniform five product
terms per macrocell. The macrocell outputs can then drive
output pins as well as provide inputs to both the FastCON-
NECT matrix and the FB in which it resides.
The Macrocell
In the default mode, there are 5 product terms that OR
together driving the D input to the macrocell flip-flop, as
shown in
Figure 3
. The most common arrangement
includes an Exclusive-OR gate capable of performing par-
ity, full addition, or logical inversion.
Another configuration exports product terms to a neighbor-
ing macrocell, increasing that macrocell’s available product
terms. Product term exporting is shown in
Figure 3
.
The XC9500 flip-flops can be configured as D- or T-type.
This permits the building of efficient counters using only a
few gates to drive the state transitions.
Table 1
summarizes
the number of product terms needed to build common logic
functions; most datapath functions require one or fewer
macrocells per bit.
Table 1: Macrocell/Product Term Allocation
Figure 2: XC9500 Function Blocks
Data Operation
P-Term Used
Shift Register
2
Counters
2-4
n:1 Mux
n
Adder
6
Exclusive-OR
2
Storage registers
1
Macrocell 18
Macrocell 1
Programmable
AND-Array
Product
Term
Allocators
From
FastCONNECT
Switch Matrix
X5878
36
1
To FastCONNECT
Switch Matrix
To I/O Blocks
OUT
Global
Set/Reset
3
18
PTOE
18
18
Global
Clocks
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