參數(shù)資料
型號: XC3064L-8TQ144C
廠商: XILINX INC
元件分類: FPGA
英文描述: Field Programmable Gate Arrays (XC3000A/L, XC3100A/L)
中文描述: FPGA, 224 CLBS, 4000 GATES, 80 MHz, PQFP144
封裝: PLASTIC, TQFP-144
文件頁數(shù): 14/76頁
文件大小: 731K
代理商: XC3064L-8TQ144C
R
XC3000 Series Field Programmable Gate Arrays
7-16
November 9, 1998 (Version 3.1)
Figure 15: Programmable Interconnection of Longlines.
This is provided at the edges of the routing area.
Three-state buffers allow the use of horizontal Longlines to form on-chip wired AND and multiplexed buses. The left two
non-clock vertical Longlines per column (except XC3020A) and the outer perimeter Longlines may be programmed as
connectable half-length lines.
V
CC
D
A
D
B
D
C
D
N
V
CC
Z
=
D
A
D
B
D
C
...
D
N
X3036
(LOW)
Figure 16: 3-State Buffers Implement a Wired-AND Function.
When all the buffer 3-state lines are High, (high
impedance), the pull-up resistor(s) provide the High output. The buffer inputs are driven by the control signals or a Low.
D
A
A
D
B
B
D
C
C
D
N
N
D
A
A
+
=
D
B
B
+D
C
C
+
D
N
N
Z
… +
X1741A
WEAK
KEEPER CIRCUIT
Figure 17: 3-State Buffers Implement a Multiplexer.
The selection is accomplished by the buffer 3-state signal.
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