參數(shù)資料
型號(hào): XA3S700A-4FGG400Q
廠商: Xilinx Inc
文件頁(yè)數(shù): 56/57頁(yè)
文件大?。?/td> 0K
描述: IC FPGA SPARTAN-3A 700K 400-FBGA
產(chǎn)品培訓(xùn)模塊: Extended Spartan 3A FPGA Family
標(biāo)準(zhǔn)包裝: 1
系列: Spartan®-3A XA
LAB/CLB數(shù): 1472
邏輯元件/單元數(shù): 13248
RAM 位總計(jì): 368640
輸入/輸出數(shù): 311
門(mén)數(shù): 700000
電源電壓: 1.14 V ~ 1.26 V
安裝類(lèi)型: 表面貼裝
工作溫度: -40°C ~ 125°C
封裝/外殼: 400-BGA
供應(yīng)商設(shè)備封裝: 400-FBGA(21x21)
XA Spartan-3A Automotive FPGA Family Data Sheet
DS681 (v2.0) April 22, 2011
Product Specification
8
General Recommended Operating Conditions
Table 8: General Recommended Operating Conditions
Symbol
Description
Min
Nominal
Max
Units
TJ
Junction temperature
I-Grade
–40
100
C
Q-Grade
–40
125
C
VCCINT
Internal supply voltage
1.140
1.200
1.260
V
VCCO(1)
Output driver supply voltage
1.100
–3.600
V
VCCAUX
Auxiliary supply
VCCAUX = 2.5
2.250
2.500
2.750
V
VCCAUX = 3.3
3.000
3.300
3.600
V
VIN
Input voltage(3)
PCI IOSTANDARD
–0.5
–VCCO+0.5
V
All other
IOSTANDARDs
IP or IO_#
–0.5
–4.10
V
IO_Lxxy_#(4)
–0.5
–4.10
V
TIN
Input signal transition time(5)
500
ns
Notes:
1.
This VCCO range spans the lowest and highest operating voltages for all supported I/O standards. Table 11 lists the recommended VCCO
range specific to each of the single-ended I/O standards, and Table 13 lists that specific to the differential standards.
2.
Define
VCCAUX selection using CONFIG VCCAUX constraint.
3.
See XAPP459, Eliminating I/O Coupling Effects when Interfacing Large-Swing Single-Ended Signals to User I/O Pins.
4.
For single-ended signals that are placed on a differential-capable I/O, VIN of –0.2V to –0.5V is supported but can cause increased leakage
between the two pins. See Parasitic Leakage in UG331, Spartan-3 Generation FPGA User Guide.
5.
Measured between 10% and 90% VCCO.
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