參數資料
型號: X9268UV24
廠商: Intersil
文件頁數: 22/22頁
文件大小: 0K
描述: IC XDCP DUAL 256TAP 50K 24-TSSOP
標準包裝: 62
系列: XDCP™
接片: 256
電阻(歐姆): 50k
電路數: 2
溫度系數: 標準值 ±300 ppm/°C
存儲器類型: 非易失
接口: I²C(設備位址)
電源電壓: 4.5 V ~ 5.5 V
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 24-TSSOP(0.173",4.40mm 寬)
供應商設備封裝: 24-TSSOP
包裝: 管件
9
FN8172.4
August 29, 2006
Table 1. Identification Byte Format
Table 2. Instruction Byte Format
Table 3. Instruction Set
Note: 1/0 = data is one or zero
Instruction
Instruction Set
Operation
I3
I2
I1
I0 RB RA
0
P0
Read Wiper Counter
Register
1001
0
1/0 Read the contents of the Wiper Counter
Register pointed to by P0
Write Wiper Counter Register
1010
0
1/0 Write new value to the Wiper Counter
Register pointed to by P0
Read Data Register
1011
1/0 1/0
0
1/0 Read the contents of the Data Register
pointed to by P0 and RB - RA
Write Data Register
1100
1/0 1/0
0
1/0 Write new value to the Data Register
pointed to by P0 and RB - RA
XFR Data Register to Wiper
Counter Register
1101
1/0 1/0
0
1/0 Transfer the contents of the Data Register
pointed to by P0 and RB - RA to its
associated Wiper Counter Register
XFR Wiper Counter Register
to Data Register
1110
1/0 1/0
0
1/0 Transfer the contents of the Wiper Counter
Register pointed to by P0 to the Data
Register pointed to by RB - RA
Global XFR Data Registers to
Wiper Counter Registers
0001
1/0 1/0
0
Transfer the contents of the Data Registers
pointed to by RB - RA of all four pots to their
respective Wiper Counter Registers
Global XFR Wiper Counter
Registers to Data Register
1000
1/0 1/0
0
Transfer the contents of both Wiper Counter
Registers to their respective data Registers
pointed to by RB - RA of all four pots
Increment/Decrement Wiper
Counter Register
0010
0
1/0 Enable Increment/decrement of the Control
Latch pointed to by P0
ID3
ID2
ID1
ID0
A3
A2
A1
A0
0
101
(MSB)
(LSB)
Device Type
Identifier
Slave Address
I3
I2
I1
I0
RB
RA
0
P0
(MSB)
(LSB)
Instruction
Register
Pot Selection
Opcode
Selection
(WCR Selection)
Data
X9268
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