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參數(shù)資料
| 型號： | WI125 |
| 廠商： | Connor-Winfield |
| 文件頁數(shù)： | 3/18頁 |
| 文件大小： | 0K |
| 描述： | IC GPS TIMING RECEIVER-OEM SMT |
| 產(chǎn)品培訓模塊： | 125 Series GPS Based Timing and Synchronization Products |
| 特色產(chǎn)品： | Wi125 GPS Timing Receiver |
| 標準包裝： | 1 |
| 類型： | 定時模塊，系統(tǒng)時鐘 |
| PLL： | 無 |
| 主要目的： | GPS，WiMax |
| 輸入： | 時鐘 |
| 輸出： | 時鐘 |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 1:2 |
| 差分 - 輸入:輸出： | 無/無 |
| 頻率 - 最大： | 10MHz |
| 電源電壓： | 1.65 V ~ 3.6 V |
| 工作溫度： | -30°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 42-QFN |
| 包裝： | 散裝 |
| 其它名稱： | CW680 W125 |
Wi125 Data Sheet #:
SG170
Page 11 of 20
Rev:
04
Date:
11/29/11
Copyright 2011 The Connor-Winfield Corp. All Rights Reserved
Specifications subject to change without notice
TMS
Type:Test
Direction:Input
Pin:22
TheTestModeSelectSignal.ThisisthestandardJTAGtestmodeinput.Thesignalreturn
pathisDIG_GND.
JTAGSEL/RTCK
Type:Test
Direction:Input/Output
Pin:21
ThisisaDualFunctionSignal.WhentheNPORsignalisasserted(low),thissignalis
aninputandselectsthefunctionoftheJTAGinterface.Whenhigh,JTAGemulationinto
theembeddedARM9processorisselected.Whenlow,theBB25ICchipboundaryscan
modeisselected.ThevalueonthissignalislatchedwhenNPORde-asserts(goeshigh).
WhenNPORisde-asserted(high)andtheJTAGemulationmodehasbeenlatched,this
signalprovidesthereturnclocktotheARMMulti-ICE.BecausetheARM9functionsoff
asingleclockdomain,theTCKhastobeinternallysynchronizedintheARM9.Thiscan
causeavariablelengthdelayinthevalidityoftheTDOsignal.TheRTCKisasynchro-
nizedversionoftheTCKsignal.TheMulti-ICEusestheRTCKoutputsignaltoindicate
whentheTDOsignalisvalid.ThesignalreturnpathisDIG_GND.
NTRST
Type:Test
Direction:Input
Pin:15
TheTestResetSignal.ThisistheactivelowJTAGtestresetsignal.Thesignalreturnpath
isDIG_GND.
4.4 Control Signals
NPOR
Type:Control
Direction:Input/Output
Pin:16
ThePowerOnResetSignal.Thisactivelow,opencollectorsignalisthemasterresetfor
theWi125.TheWi125canbeheldinresetbyassertingthissignal.Thesignalcanbe
usedtoresetexternalcircuitry,butcaremustbetakentoensurenoDCcurrentisdrawn
fromthissignalastheinternalpull-upresistorvalueis100K.
NRESET
Type:Control
Direction:Input/Output
Pin:10
TheSystemResetSignal.Thisactivelow,opencollectorsignalisgeneratedbythe
BB25ICchipinresponsetotheassertionoftheNPOR.Itmayalsobedriventoresetthe
ARM9processorintheBB25ICwithoutcompletelyre-initializingthechip.
BOOTSEL
Type:Control
Direction:Input
Pin:11
TheBootSelectSignal.TheBB25IChasfourbootupmodes,butonlytwoaresupported
bytheWi125.ThissignalissampledwhentheNPORisde-asserted.IftheBOOTSEL
signalishighorleftfloating,thentheWi125bootsfromitson-chipFLASHmemory.Ifthe
BOOTSELsignalispulledlow,theWi125bootsfromitson-chipROM.
4 SIGNAL DESCRIPTION continued
4.3 Power Signals cont’d
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