參數(shù)資料
型號: WI125
廠商: Connor-Winfield
文件頁數(shù): 2/18頁
文件大?。?/td> 0K
描述: IC GPS TIMING RECEIVER-OEM SMT
產(chǎn)品培訓模塊: 125 Series GPS Based Timing and Synchronization Products
特色產(chǎn)品: Wi125 GPS Timing Receiver
標準包裝: 1
類型: 定時模塊,系統(tǒng)時鐘
PLL:
主要目的: GPS,WiMax
輸入: 時鐘
輸出: 時鐘
電路數(shù): 1
比率 - 輸入:輸出: 1:2
差分 - 輸入:輸出: 無/無
頻率 - 最大: 10MHz
電源電壓: 1.65 V ~ 3.6 V
工作溫度: -30°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 42-QFN
包裝: 散裝
其它名稱: CW680
W125
Wi125 Data Sheet #:
SG170
Page 10 of 20
Rev:
04
Date:
11/29/11
Copyright 2011 The Connor-Winfield Corp. All Rights Reserved
Specifications subject to change without notice
VBATT
Type:Power
Direction:Input/Output
Pin:27
TheBatteryBackupSupply.TheWi125hasanonboardRealTimeClock(RTC).Thisis
poweredfromtheVBATTsignal.Asupplyoftypically3v(greaterthan2.5Vandlessthan
DIG_3V3)shouldbeappliedtothissignal.Thissignalcanbeleftfloatingifnotrequired.
Theinputhasablockingdiodeandsorechargeablebatterieswillneedanexternalcharg-
ingcircuit.Typically,a1Kresisterinserieswiththissignalandtheexternalbatterywill
provideaneasymethodofmeasuringthecurrentconsumptionfromVBATTduringtest.
4.2 RF Signals
RF_IN
Type:RF
Direction:Input
Pin:24
TheRFInputSignal.ThisattachestotheGPSantenna.StandardRFdesignrulesmust
beusedwhentrackingtothissignal.ThissignalhasanRFblockedconnectiontothe
ANT_SUPPLYsignal.ThisisthesamesignalpresentedontheRFconnectoronthe
Wi125.Onlyoneantennaconnectionshouldbemade.IftheRFconnectoristobeused,
thenthereshouldbenoconnection,evenanunconnectedpad,tothiscastellation.
TRIM
Type:RF
Direction:Input
Pin:12
ThissignaltrimstheoutputfrequencyoftheVCTCXO.Thissignalisnormallyleftopen.
Whenfloating,thissignalisbiasedtothecontrolvoltageoftheVCTCXO.Anynoisein-
jectedintothissignalwillseverelycompromisetheperformanceoftheWi125.Thissignal
shouldonlybeusedinconjunctionwithspecificapplicationnotes.
EXT_CLK
Type:RF
Direction:Input
Pin:7
Thisinputistheexternalclockinput.Thissignalistobeusedonlyinspecialbuildsof
theWi125thatarenotfittedwithaninternalVCTCXO.Forthenormalbuild,containing
theVCTCXO,donotconnectthisinput.Theexternalclockisa9MHzto26MHzclipped
sinewaveinputwithanamplitudebetween1Vand3Vpeaktopeak.Thereturnpathfor
thissignalisRF_GND.
4.3 Emulation/Test Signals
TDI
Type:Test
Direction:Input
Pin:14
TheTestDataInSignal.ThisisthestandardJTAGtestdatainput.Thesignalreturnpath
isDIG_GND.
TDO
Type:Test
Direction:Output
Pin:13
TheTestDataOutSignal.ThisisthestandardJTAGtestdataoutput.Thesignalreturn
pathisDIG_GND.
TCK
Type:Test
Direction:Input
Pin:20
TheTestClockSignal.ThisisthestandardJTAGtestclockinput.Thesignalreturnpathis
DIG_GND.
4 SIGNAL DESCRIPTION continued
4.1 Power Signals cont’d
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