參數(shù)資料
型號: VT86C926
廠商: Electronic Theatre Controls, Inc.
英文描述: AMAZON PCI ETHERNET CONTROLLER
中文描述: 亞馬遜的PCI以太網(wǎng)控制器
文件頁數(shù): 22/24頁
文件大?。?/td> 87K
代理商: VT86C926
VIA T
ECHNOLOGIES
, I
NC
.
P
RELIMINARY
VT86C926
22
RSAR = ((BNRY + 1) << 8) + PktPointer.
RBCR = PktLen - PktPointer.
Use remote DMA to read packet data into offset PktBuffer + PktPointer.
PktPointer = 0.
If PktPointer = 0,
Do the normal driver packet received procedure,
but get packet data from PktBuffer, not the receive buffer ring.
Else go to interrupt entry to poll ISR again.
Rx condition
Packet
page data received
Total packet received
ISR
1
RSR
0
CURR
BNRY+1
CLDC
<>0
header
or
1
1
BNRY+1 +
(packet pages)
BNRY+1 +
(packet pages)
X
= 0
More then one packet
1
0
<>0
CRC or page align
error
4
4
X
13.
E
ARLY
T
RANSMIT
M
ODE
In order to provide the VT86C926 with parallel processing between the ISA bus and Ethernet media, the
VT86C926 must be set to detect early transmit error mode. This error may occur when the system's master
device uses the ISA bus and then uses the data bus.
If the ETEN bit is set in the configuration register B, the transmit status status bit5 (ETUN) and the transmit
error status bit (TXE) in the interrupt service register (ISR) bit 3 would be set on. If the interrupt mask
register TXEE bit is set to on, an interrupt will be generated when the local DMA pass the remote DMA
machine.
This mode is essentially similar to the Early Interrupt Receive Mode. When the VT86C926 is under the
normal mode, the CPU can issue the "transmit packet" command to the VT86C926 and the internal local
DMA will tranfer the data from the SRAM to the Ethernet. However, the packet data must already exist in
SRAM.
In the situation in which the "transmit packet" command is issued to the local DMA and the remote DMA
(to fill SRAM) at the same time, a corrupt packet may be transmitted to the network and remain undetected.
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