參數(shù)資料
型號: VT86C926
廠商: Electronic Theatre Controls, Inc.
英文描述: AMAZON PCI ETHERNET CONTROLLER
中文描述: 亞馬遜的PCI以太網(wǎng)控制器
文件頁數(shù): 11/24頁
文件大小: 87K
代理商: VT86C926
VIA T
ECHNOLOGIES
, I
NC
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RELIMINARY
VT86C926
11
6.4. PCI Configuration Space
Device ID
( 0926 )
STATUS
Vendor ID
( 1106 )
COMMAND
00 h
(DEVS1, DEVS0 ) = ( 1 , 0 )
CLASS CODE
( MMSPACE, IOSOACE)
Revision ID
04 h
( 02_00_00 )
BIST
( 00 )
Cache Line
08 h
( 00 )
IO SPACE 0
Header type
( 00 )
Latency Timer
( 00 )
( 00 )
0c h
0
0 0 1
10 h
Reserved
Reserved
SUB Vendor ID
FR EEPROM contents
2c h
EXP ROM BASE [ 31: 15 ]
ROM14
0000_0000_00000
EN
30 h
Reserved
Reserved
Max_LAT
( 00 )
Min_GNT
( 00 )
INT PIN
( 01 )
INTLINE
INTL [7:0]
3c h
6.5. Direct Programming of EEPROM
The VT86C926 features a easy way to program external EEPROM in-situ. When the RESET is active and
if the upper byte of 0FH on EEPROM is not 73H, the EEPR bit will not be set to indicate that the current
EEPROM has not been programmed yet. This will allow the VT86C926 to enter Direct Programming
mode if EELOAD is also set. In this mode the user can directly control the EEPROM interface signals by
writing to the ECSR Port and the value on the EECS, ESK and EDI bits will be driven onto the EECS,
SK(MD2), and DI(MD1) outputs respectively. These outputs will be latched so the user can generate a
clock on SK by repetitively writing 1 then 0 to the appropriate bit. This can be used to generate the
EEPROM signals as per the 93C46 data sheet.
To read the EEPROM data, users have to generate EEPROM interface signals into EECS, DI and SK as
described above and in the mean time read the data from DO(MD0) input via pin SD0. Reading Data
Transfer Port during programming will not affect the latched data on EECS, SK, and DI outputs. When the
EEPROM has been programmed and verified (remember to program the upper byte of 0EH with 73H), the
user must give VT86C926 a power-on reset to return to normal operation and to read in the new data.
The Direct Programming mode is mainly used for production to program every bit of the EEPROM. Once
the upper byte of 0EH has been programmed with 073H and a power-on reset has been performed, there is
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