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參數(shù)資料
| 型號： | VSC830 |
| 廠商： | Vitesse Semiconductor Corporation. |
| 英文描述： | 2.7Gb/s Asynchronous Dual 2x2 Crosspoint Switch |
| 中文描述： | 2.7Gb / s的異步雙2x2交叉點開關(guān) |
| 文件頁數(shù)： | 13/18頁 |
| 文件大小： | 195K |
| 代理商： | VSC830 |
VITESSE
Data Sheet
VSC830
Dual 2x2 Crosspoint Switch
2.7Gb/s Asynchronous
G52192-0, Rev 4.0
05/23/01
Page 13
VITESSE
SEMICONDUCTOR CORPORATION
741 Calle Plano
Camarillo, CA 93012
Tel: (800) VITESSE
FAX: (805) 987-5896
Email: prodinfo@vitesse.com
Internet: www.vitesse.com
The high-speed outputs (Y1A+/-, Y1B+/-, Y2A+/- and Y2B+/-) each consist of a differential pair designed
to drive a 50
transmission line. The transmission line should be terminated with a 100
resistor at the receiver
of the downstream device between the true and complement outputs. No connection to a termination voltage is
required. The output driver is source terminated to 50
on-chip, providing a snubbing of any reflections. Out-
put power can be cut by tying V
EE
to V
CC.
In single ended mode, the unused output must be terminated with
50
. Some output termination examples are shown in Figures 6 and 7.
Figure 6: Examples of High-Speed Output I/O Termination for VSC830
V
CC
V
CC
50
50
50
0.1 μ
F
0.1 μ
F
50
V
CC
V
CC
Z
O
= 50
V
CC
V
CC
50
50
100
0.1 μ
F
0.1 μ
F
Z
O
= 50
V
CC
V
CC
50
50
0.1 μ
F
0.1 μ
F
50
50
100
pF
Z
O
= 50
a) AC Termination #1
b) AC Termination #2 (Internal biasing required for Receiver)
c) AC Termination #3
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