參數(shù)資料
型號(hào)： VPX322XE
廠商： MICRONAS SEMICONDUCTOR HOLDING AG
英文描述： Video Pixel Decoders
中文描述： 視頻解碼器像素
文件頁數(shù)： 27/92頁
文件大?。?/td> 567K
代理商： VPX322XE
ADVANCE INFORMATION
VPX 322xE
27
Micronas
2.10. Operational Modes
The relationship between the video timing signals
(HREF and VREF) and the analog input video is deter-
mined by the selected operational mode. Two such
modes are available: the
Open Mode
, and the
Scan
Mode
. These modes are selected via I
2
C commands
[FP-RAM 0x140, settm, lattm].
2.10.1. Open Mode
In the Open Mode, both the HREF and the VREF signal
track the analog video input. In the case of a change in
the line standard (i.e. switching between the video input
ports), HREF and VREF automatically synchronize to
the new input. When no video is present, both HREF and
VREF float to the idling frequency of their respective
PLLs. During changes in the video input (drop-out,
switching between inputs), the performance of the
HREF and VREF signals is not guaranteed.
2.10.2. Scan Mode
In the Scan Mode, the HREF and VREF signals are al-
ways generated by free running hardware. They are
therefore completely decoupled from the analog input.
The output video data is always suppressed.
The purpose of the Scan Mode is to allow the external
controller to freely switch between the analog inputs
while searching for the presence of a video signal. In-
formation regarding the video (standard, source, etc...)
can be queried via I
2
C read.
In the Scan Mode, the video line standard of the VREF
and HREF signals can be changed via I
2
C command.
The transition always occurs at the first frame boundary
after the I
2
C command is received. Fig. 2
–
31, below,
demonstrates the behavior of the VREF signal during
the transition from the 525/60 system to the 625/50 sys-
tem (the width of the vertical reference pulse is exagger-
ated for illustration).
VREF
f
odd
f
odd
f
even
f
even
f
odd
time
16.683 ms
I
2
C Command to
switch video timing standard
Selected timing standard
becomes active
(525/60)
(625/50)
Fig. 2
–
31:
Transition between timing standards
20.0 ms
33.367 ms
40.0 ms
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