參數(shù)資料
型號(hào): V55C1256164MGLI-75H
廠商: PROMOS TECHNOLOGIES INC
元件分類: DRAM
英文描述: SYNCHRONOUS DRAM, PDSO54
封裝: 0.400 INCH, GREEN, PLASTIC, TSSOP2-54
文件頁數(shù): 16/48頁
文件大?。?/td> 634K
代理商: V55C1256164MGLI-75H
23
V55C1256164MG Rev. 1.0 September 2008
ProMOS TECHNOLOGIES
V55C1256164MG
6.2 Write Interrupted by a Read
(Burst Length = 4, CAS latency = 2, 3)
7. Burst Write with Auto-Precharge
Burst Length = 2, CAS latency = 2, 3)
COMMAND
NOP
WRITE A
READ B
NOP
tCK2, I/O’s
CAS latency = 2
DIN A0
tCK3, I/O’s
CAS latency = 3
DIN A0
CLK
T0
T2
T1
T3
T4
T5
T6
T7
T8
DOUT B3
DOUT B0
DOUT B1
DOUT B2
DOUT B3
don’t care
DOUT B0
DOUT B1
DOUT B2
Input data must be removed from the I/O’s at least one clock
cycle before the Read data appears on the outputs to avoid
data contention.
Command
CLK
*
tWR
*
CAS latency = 2
CAS latency = 3
tCK2, I/O’s
Bank
Activate
NOP
DIN A0
DIN A1
DIN A0
DIN A1
tWR
tRP
Begin Autoprecharge
Bank can be reactivated after tRP
WRITEA
Auto-Precharge
T0
T1
T2
T3
T4
T5
T6
T7
T8
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