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參數(shù)資料
| 型號： | V53C8128HK45 |
| 廠商： | MOSEL-VITELIC |
| 元件分類： | DRAM |
| 英文描述： | 128K X 8 EDO DRAM, 45 ns, PDSO24 |
| 封裝： | 0.300 INCH, SOJ-26/24 |
| 文件頁數(shù)： | 16/20頁 |
| 文件大?。?/td> | 222K |
| 代理商： | V53C8128HK45 |
5
MOSEL-VITELIC
V53C8128H
V53C8128H Rev. 1.1 November 1997
AC Characteristics
TA = 0°C to 70°C, VCC = 5 V ±10%, VSS = 0V unless otherwise noted
AC Test conditions, input pulse levels 0 to 3V
35
40
45
50
#
Symbol
Parameter
Min. Max. Min. Max. Min. Max. Min. Max.
Unit
Notes
1tRL1RH1
tRAS
RAS Pulse Width
35
75K
40
75K
45
75K
50
75K
ns
2tRL2RL2
tRC
Read or Write Cycle Time
70
75
80
90
ns
3tRH2RL2
tRP
RAS Precharge Time
25
30
ns
4tRL1CH1
tCSH
CAS Hold Time
35
40
45
50
ns
5tCL1CH1
tCAS
CAS Pulse Width
7899
ns
6tRL1CL1
tRCD
RAS to CAS Delay
16
23
17
28
18
32
19
36
ns
7tWH2CL2
tRCS
Read Command Setup Time
0000
ns
4
8tAVRL2
tASR
Row Address Setup Time
0000
ns
9tRL1AX
tRAH
Row Address Hold Time
6789
ns
10
tAVCL2
tASC
Column Address Setup Time
0000
ns
11
tCL1AX
tCAH
Column Address Hold Time
4567
ns
12
tCL1RH1(R) tRSH (R)
RAS Hold Time (Read Cycle)
14
15
ns
13
tCH2RL2
tCRP
CAS to RAS Precharge Time
5555
ns
14
tCH2WX
tRCH
Read Command Hold Time
0000
ns
5
Referenced to
CAS
15
tRH2WX
tRRH
Read Command Hold Time
0000
ns
5
Referenced to
RAS
16
tOEL1RH2
tROH
RAS Hold Time
8
9
10
ns
Referenced to
OE
17
tGL1QV
tOAC
Access Time from
OE
12
13
14
ns
18
tCL1QV
tCAC
Access Time from
CAS (EDO)
12
13
14
ns
6, 7
19
tRL1QV
tRAC
Access Time from
RAS
35
40
45
50
ns
6, 8, 9
20
tAVQV
tCAA
Access Time from Column
18
20
22
24
ns
6, 7, 10
Address
21
tCL1QX
tLZ
CAS to Low-Z Output
0000
ns
16
22
tCH2QZ
tHZ
Output buffer turn-off delay time
0
6
0
6
0
7
0
8
ns
16
23
tRL1AX
tAR
Column Address Hold Time
28
30
35
40
ns
from
RAS
24
tRL1AV
tRAD
RAS to Column Address
11
17
12
20
13
23
14
26
ns
11
Delay Time
25
tCL1RH1(W) tRSH (W)
RAS or CAS Hold Time
12
13
14
ns
in Write Cycle
26
tWL1CH1
tCWL
Write Command to
CAS
12
13
14
ns
Lead Time
JEDEC
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