參數(shù)資料
型號(hào): USS-820D
英文描述: USS-820D USB Device Controller
中文描述: 號(hào)- 820D USB設(shè)備控制器
文件頁數(shù): 9/58頁
文件大?。?/td> 868K
代理商: USS-820D
Agere Systems Inc.
9
Data Sheet, Rev. 4
June 2001
USB Device Controller
USS-820D
Pin Information
(continued)
Table 2. Pin Descriptions
(continued)
* Active-low signals within this document are indicated by an N following the symbol names.
Pins marked as NC must have no external connections, except where noted.
Register Timing Characteristics
All register timing specifications assume a 100 pF load on the D[7:0] package pins and a 70 pF load on all other
package pins.
44-Pin MQFP
(USS-820D)
27
48-Pin TQFP
(USS-820TD)
30
Symbol
*
Type
Name/Description
IRQN
O
Interrupt (Programmable Active-Low or Active-High).
An interrupt signal is sent to the controller whenever an
event such as TX/RX done, SUSPEND, RESUME,
USBRESET, or SOF occurs.
Start of Frame (Active-Low).
This signal is asserted low
for eight t
CLK
periods when an SOF token is received.
Reset.
When this signal is held high, all state machines and
registers are set at the default state.
No Connect.
For compatibility with the USS-820 revision
B, this pin can be connected to a 3 V or 5 V supply with no
harmful effect.
Chip Select (Active-Low).
Control Register Write (Active-Low).
Control Register Read (Active-Low).
Data Bus.
28
31
SOFN
O
29
32
RESET
I
30
33
NC
31
32
33
34
35
36
IOCSN
WRN
RDN
D[7:0]
I
I
I
35, 36, 37,
38, 39, 41,
42, 43
38, 39, 40,
41, 42, 44,
45, 46
I/O
Table 3. Timing Parameters
Symbol
t
CLK
t
RST
Parameter
Min
500
Max
83.3
Unit
ns
ns
Internal Clock Period
RESET Assert Time
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