參數(shù)資料
型號: USB1T11AMX
廠商: Fairchild Semiconductor
文件頁數(shù): 3/10頁
文件大?。?/td> 0K
描述: IC TXRX SERIAL BUS UNIV 14SOIC
標準包裝: 1
類型: 收發(fā)器
驅(qū)動器/接收器數(shù): 1/1
規(guī)程: USB 1.1
電源電壓: 3 V ~ 3.6 V
安裝類型: 表面貼裝
封裝/外殼: 14-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 14-SOIC
包裝: 標準包裝
產(chǎn)品目錄頁面: 1223 (CN2011-ZH PDF)
其它名稱: USB1T11AMXDKR
1999 Fairchild Semiconductor Corporation
www.fairchildsemi.com
USB1T11A Rev. 1.0.4
2
U
S
B
1
T11A
U
n
iversal
Serial
B
u
s
Transceiver
Pin Configuration
MODE
/OE
RCV
VP
VM
SUSPND
GND
VCC
VMO/FSEO
VPO
D+
D-
SPEED
NC
14
13
12
11
10
9
8
1
2
3
4
5
6
7
Figure 2. TSSOP and SOIC Pin Assignments
Pin Descriptions
Pin Names
I/O
Description
RCV
O
Receive Data. CMOS level output for USB differential input.
/OE
I
Output Enable. Active LOW, enables the transceiver to transmit data on the bus.
When not active, the transceiver is in receive mode.
Mode
I
Mode. When left unconnected, a weak pull-up transistor pulls it to VCC and, in this
GND, the VMO/FSEO pin takes the function of FSEO (force SEO).
VPO,VMO/FSEO
I
Inputs to differential driver. (Outputs from SIE.)
Mode
VPO
VMO/FSEO
RESULT
0
Logic “0”
0
1
/SEO
0
1
0
Logic “1”
0
1
/SEO
1
0
/SEO
1
0
1
Logic “0”
1
0
Logic “1”
1
Illegal Code
VP,VM
O
Buffered version of D- and D+. Outputs are logic “0” and logic “1.” Used to detect
single ended zero (/SEO), error conditions, and interconnected speed. (Input to SIE).
VP
VM
RESULT
0
/SEO
0
1
Low Speed
1
0
Full Speed
0
1
Error
D+, D-
AI/O
Data+, Data-. Differential data bus conforming to the Universal Serial Bus standard.
SUSPND
I
Suspend. Enables a low-power state while the USB bus is inactive. While the
suspend pin is active, it drives the RCV pin to a logic “0” state. Both D+ and D- are 3-
STATE.
Speed
I
Edge Rate Control. Logic “1” operates at edge rates for “full speed.” Logic “0”
operates edge rates for “l(fā)ow speed.”
VCC
3.0 to 3.6 power supply.
GND
Ground reference.
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