參數(shù)資料
型號： UPD784915B
廠商： NEC Corp.
英文描述： 16-BIT SINGLE-CHIP MICROCONTROLLERS
中文描述： 16位單晶片微控制器
文件頁數(shù)： 26/86頁
文件大?。?/td> 384K
代理商： UPD784915B
μ
PD784915B, 784916B
26
Table 3-2. Special Function Registers (3/4)
Bit
Bit Units for
After
Address
Special Function Register (SFR) Name
Symbol
R/W
Length
Manipulation
Releasing
1 bit
-
-
-
8 bits
-
16 bits
Reset
FF76H
PWM5 modulo register
PWM5
R/W
16
√
-
-
-
0000H
FF77H
PWM4 modulo register
PWM4
8
√
√
√
-
00H
FF78H
Event divider control register
EDVC
W
8
00H
FF79H
Clock output mode register
CLOM
R/W
8
√
-
00H
FF7AH
Timer 4 capture/compare register 0
CR40
16
√
-
Cleared to 0
FF7BH
Clock control register
CC
8
√
-
-
-
√
-
00H
FF7CH
Timer 4 capture register 1
CR41
R
16
√
-
Cleared to 0
FF7DH
Capture/compare control register
CRC
W
8
√
-
00H
FF7EH
Timer 5 compare register
CR50
R/W
16
√
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Cleared to 0
FF84H
Serial mode register 1
CSIM1
8
√
-
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
-
00H
FF85H
Serial shift register 1
SIO1
8
Undefined
FF88H
Serial mode register 2
CSIM2
8
√
-
-
00H
FF89H
Serial shift register 2
SIO2
8
Undefined
FF8AH
Serial control register 2
CSIC2
8
00H
FF91H
Head amplifier switch output control register
HAPC
8
√
√
√
√
√
√
√
√
√
√
√
√
√
√
√
-
-
-
-
-
-
-
-
-
FF94H
Amplifier control register
AMPC
8
FF95H
Amplifier mode register 0
AMPM0
8
FF96H
Amplifier mode register 1
AMPM1
8
FF97H
Gain control register
CTLM
8
FFA0H
External interrupt mode register
INTM0
8
000000
×
0
FFA1H
External capture mode register 1
INTM1
8
00H
FFA2H
External capture mode register 2
INTM2
8
FFA6H
Key interrupt control register
KEYC
8
70H
FFA8H
In-service priority register
ISPR
R
8
00H
FFAAH
Interrupt mode control register
IMC
R/W
8
80H
FFACH
Interrupt mask flag register
MK0L
8
√
FFH
FFADH
MK0H
8
FFAEH
MK1L
8
√
FFAFH
MK1H
8
FFB0H
FRC capture register 0L
CPT0L
R
16
√
-
Cleared to 0
FFB1H
FRC capture register 0H
CPT0H
8
√
-
FFB2H
FRC capture register 1L
CPT1L
16
√
-
FFB3H
FRC capture register 1H
CPT1H
8
√
-
FFB4H
FRC capture register 2L
CPT2L
16
√
-
FFB5H
FRC capture register 2H
CPT2H
8
√
-
FFB6H
FRC capture register 3L
CPT3L
16
√
-
FFB7H
FRC capture register 3H
CPT3H
8
√
-
FFB8H
FRC capture register 4L
CPT4L
16
√
Remark
Cleared to 0: Counter is initialized to 0 within 16 clocks after the reset signal has been deasserted (the
contents before initialization are undefined).
MK0
MK1
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