參數(shù)資料
型號(hào)： UPD784907GF-XXX-3BA
廠商： NEC Corp.
英文描述： 16-Bit Microcontroller
中文描述： 16位微控制器
文件頁數(shù)： 4/98頁
文件大?。?/td> 657K
代理商： UPD784907GF-XXX-3BA
μ
PD784907, 784908
4
Data Sheet U11680EJ2V0DS00
FUNCTIONS
Part Number
μ
PD784907
μ
PD784908
Item
Number of basic instructions
(mnemonics)
113
General-purpose register
8 bits
×
16 registers
×
8 banks, or 16 bits
×
8 registers
×
8 banks (memory mapping)
Minimum instruction execution
time
320 ns/636 ns/1.27
μ
s/2.54
μ
s (at 6.29 MHz)
160 ns/320 ns/636 ns/1.27
μ
s (at 12.58 MHz)
Internal
memory
ROM
96 K
128 K
RAM
3,584 bytes
4,352 bytes
Memory space
1 Mbyte with program and data spaces combined
I/O ports
Total
80
Input
8
Input/output
72
Additional
function
pins
Note
LED direct
drive outputs
24
Transistor
direct drive
8
N-ch open
drain
4
Real-time output ports
4 bits
×
2, or 8 bits
×
1
IEBus controller
Incorporated (simplified)
Timer/counter
Timer/counter 0:
(16 bits)
Timer register
×
1
Capture register
×
1
Compare register
×
2
Pulse output capability
Toggle output
PWM/PPG output
One-shot pulse output
Timer/counter 1:
(16 bits)
Timer register
×
1
Capture register
×
1
Capture/compare register
×
1
Compare register
×
1
Real-time output port
Timer/counter 2:
(16 bits)
Timer register
×
1
Capture register
×
1
Capture/compare register
×
1
Compare register
×
1
Pulse output capability
Toggle output
PWM/PPG output
Timer 3:
(16 bits)
Timer register
×
1
Compare register
×
1
Watch timer
Interrupt requests are generated at 0.5-second intervals. (A watch clock oscillator is
incorporated.)
Either the main clock (6.29 MHz/12.58 MHz) or watch clock (32.7 kHz) can be selected
as the input clock.
Clock output
Selectable from f
CLK
, f
CLK
/2, f
CLK
/4, f
CLK
/8, or f
CLK
/16 (can be used as a 1-bit output port)
PWM outputs
12-bit resolution
×
2 channels
Serial interface
UART/IOE (3-wire serial I/O):2 channels (on-chip baud rate generator)
CSI (3-wire serial I/O):
2 channels
A/D converter
8-bit resolution
×
8 channels
Note
Additional function pins are included in the I/O pins.
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