![](http://datasheet.mmic.net.cn/370000/UPD784031GC-3B9_datasheet_16743921/UPD784031GC-3B9_22.png)
μ
PD784031
22
7.2.3 Special function registers (SFRs)
The special function registers are registers with special functions such as mode registers and control registers
for built-in peripheral hardware. The special function registers are mapped onto the 256-byte space between 0FF00H
and 0FFFFH
Note
.
Note
Applicable when the LOCATION 0 instruction is executed. FFF00H-FFFFFH when the LOCATION 0FH
instruction is executed.
Caution Never attempt to access addresses in this area where no SFR is allocated. Otherwise, the
μ
PD784031 may be placed in the deadlock state. The deadlock state can be cleared only by a
reset.
Table 7-1 lists the special function registers (SFRs). The titles of the table columns are explained below.
Abbreviation ................... Symbol used to represent a built-in SFR. The abbreviations listed in the table are
reserved words for the NEC assembler (RA78K4). The C compiler (CC78K4) allows
the abbreviations to be used as sfr variables with the #pragma sfr command.
R/W ................................. Indicates whether each SFR allows read and/or write operations.
R/W : Allows both read and write operations.
R
: Allows read operations only.
W
: Allows write operations only.
Manipulatable bits .......... Indicates the maximum number of bits that can be manipulated whenever an SFR is
manipulated. An SFR that supports 16-bit manipulation can be described in the sfrp
operand. For address specification, an even-numbered address must be speci-
fied.
An SFR that supports 1-bit manipulation can be described in a bit manipulation
instruction.
When reset ..................... Indicates the state of each register when RESET is applied.