參數(shù)資料
型號(hào)： UPD780021AYGC-XXX-8BS
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 8.38 MHz, MICROCONTROLLER, PQFP64
封裝： 14 X 14 MM, PLASTIC, LQFP-64
文件頁(yè)數(shù)： 58/96頁(yè)
文件大?。?/td> 723K
代理商： UPD780021AYGC-XXX-8BS
61
PD780021A, 780022A, 780023A, 780024A, 780021AY, 780022AY, 780023AY, 780024AY
Data Sheet U14042EJ4V0DS
DC Characteristics (TA = –40 to +85
°C, VDD = 1.8 to 5.5 V)
Parameter
Symbol
Conditions
MIN.
TYP.
MAX.
Unit
Power supply
IDD1Note 2 8.38 MHz
VDD = 5.0 V
±10%Note 3 When A/D converter is
5.5
11
mA
currentNote 1
crystal oscillation
stopped
operating mode
When A/D converter is
6.5
13
mA
operatingNote 6
5.00 MHz
VDD = 3.0 V
±10%Note 3 When A/D converter is
2
4
mA
crystal oscillation
stopped
operating mode
When A/D converter is
3
6
mA
operatingNote 6
VDD = 2.0 V
±10%Note 4 When A/D converter is
0.4
1.5
mA
stopped
When A/D converter is
1.4
4.2
mA
operatingNote 6
IDD2
8.38 MHz
VDD = 5.0 V
±10%Note 3 When peripheral functions
1.1
2.2
mA
crystal oscillation
are stopped
HALT mode
When peripheral functions
4.7
mA
are operating
5.00 MHz
VDD = 3.0 V
±10%Note 3 When peripheral functions
0.35
0.7
mA
crystal oscillation
are stopped
HALT mode
When peripheral functions
1.7
mA
are operating
VDD = 2.0 V
±10%Note 4 When peripheral functions
0.15
0.4
mA
are stopped
When peripheral functions
1.1
mA
are operating
IDD3
32.768 kHz crystal oscillation
VDD = 5.0 V
±10%
40
80
A
operating modeNote 5
VDD = 3.0 V
±10%
20
40
A
VDD = 2.0 V
±10%
10
20
A
IDD4
32.768 kHz crystal oscillation
VDD = 5.0 V
±10%
30
60
A
HALT modeNote 5
VDD = 3.0 V
±10%
6
18
A
VDD = 2.0 V
±10%
2
10
A
IDD5
XT1 = VDD STOP mode
VDD = 5.0 V
±10%
0.1
30
A
When feedback resistor is not used
VDD = 3.0 V
±10%
0.05
10
A
VDD = 2.0 V
±10%
0.05
10
A
Notes 1. Total current through the internal power supply (VDD0, VDD1) (except the current through pull-up resistors
of ports).
2. IDD1 includes the peripheral operation current.
3. When the processor clock control register (PCC) is set to 00H.
4. When PCC is set to 02H.
5. When main system clock operation is stopped.
6. Includes the current through the AVDD pin.
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