![](http://datasheet.mmic.net.cn/370000/UPD75008_datasheet_16740754/UPD75008_39.png)
μ
PD75004, 75006, 75008
39
Ma-
chine
Cyc-
les
Ad-
dress-
ing
Area
Instruc-
tions
Mne-
monics
Operand
Bytes
Operation
Skip
Conditions
RETI
1
3
μ
PD75004
MBE, x, x, x
←
(SP+1)
PC
11-0
←
(SP)(SP+3)(SP+2)
PSW
←
(SP+4)(SP+5), SP
←
SP+6
μ
PD75006, 75008
MBE, x, x, PC
12
←
(SP+1)
PC
11-0
←
(SP)(SP+3)(SP+2)
PSW
←
(SP+4)(SP+5), SP
←
SP+6
(SP-1)(SP-2)
←
rp, SP
←
SP-2
(SP-1)
←
MBS, (SP-2)
←
0, SP
←
SP-2
rp
←
(SP+1)(SP), SP
←
SP+2
MBS
←
(SP+1), SP
←
SP+2
IME
←
1
IExxx
←
1
IME
←
0
IExxx
←
0
A
←
PORT
n
XA
←
PORT
n+1
,PORT
n
PORT
n
←
A
PORT
n+1
, PORT
n
←
XA
Set HALT Mode (PCC.2
←
1)
Set STOP Mode (PCC.3
←
1)
No Operation
MBS
←
n (n = 0, 1, 15)
μ
PD75004
Where TBR instruction,
11-0
←
(taddr)
3-0
+(taddr+1)
Where TCALL instruction,
(SP-4)(SP-1)(SP-2)
←
PC
11-0
(SP-3)
←
MBE, 0, 0, 0
PC
11-0
←
(taddr)
3-0
+(taddr+1)
SP
SP-4
.........................................................
PUSH
rp
BS
1
2
1
2
POP
rp
BS
1
2
2
2
1
2
2
2
Inter-
rupt
EI
IExxx
Control
DI
2
2
2
2
2
2
2
2
IExxx
A, PORTn
XA, PORTn
I/O
IN *
(n = 0-8)
(n = 4, 6)
OUT *
PORTn, A
PORTn, XA
2
2
2
2
2
2
2
2
(n = 2-8)
(n = 4, 6)
CPU
Control
HALT
STOP
NOP
SEL
GETI
1
2
1
1
2
3
Special
MBn
taddr
*10
Except for TBR and TCALL
instructions,
Instruction execution of
(taddr)(taddr+1)
Depends on
referenced
instruction
μ
PD75006, 75008
Where TBR instruction,
12-0
←
(taddr)
4-0
+(taddr+1)
.....PC
Where TCALL instruction,
(SP-4)(SP-1)(SP-2)
←
PC
11-0
(SP-3)
←
MBE, 0, 0, PC
12
PC
12-0
←
(taddr)
4-0
+(taddr+1)
SP
SP-4
.........................................................
Except for TBR and TCALL
instructions,
Instruction execution of
(taddr)(taddr+1)
Depends on
referenced
instruction
*: When executing the IN/OUT instruction, MBE = 0, or MBE = 1, and MBS = 15.
.....PC
.............................
.............................
.............................
.............................
Subrou-
tine/
Stack
Control
(Cont‘d)