參數(shù)資料
型號(hào): UPD720122GC-9EU
廠商: NEC Corp.
英文描述: MOS Integrated Circuit
中文描述: 馬鞍山集成電路
文件頁(yè)數(shù): 40/82頁(yè)
文件大?。?/td> 650K
代理商: UPD720122GC-9EU
Data Sheet S16685EJ2V0DS
40
μ
PD720122
(2) CPU bus write operation
Symbol
Parameter
Min.
Typ.
Max.
Unit
TB13
Write cycle time
58
ns
TB14
Address setup time (ALE
)
17
ns
TB15
Chip select setup time (ALE
)
17
ns
TB16
Write command delay time (ALE
)
7
ns
TB17
Input data setup time (WRB
)
10
ns
TB18
Input data hold time (WRB
)
0
ns
TB19
Write command width
34
ns
TB20
Chip select hold time (WRB
)
0
ns
TB21
Chip select setup time (WRB
)
5
ns
Remark
It is assumed that the external pin capacitance is 15 pF (data bus = 50 pF).
CPU bus write timing
WRB
AD7 to AD0
D15 to D8
Note
CSB
ADDRESS
VALID
tb
18
tb
19
ALE
DATA
VALID
tb
2
tb
16
tb
20
ADDRESS
VALID
tb
13
tb
17
tb
10
tb
21
tb
15
tb
9
Note
D7 to D0 for Function 2
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