參數(shù)資料
型號: UPD720122GC-9EU
廠商: NEC Corp.
英文描述: MOS Integrated Circuit
中文描述: 馬鞍山集成電路
文件頁數(shù): 21/82頁
文件大?。?/td> 650K
代理商: UPD720122GC-9EU
Data Sheet S16685EJ2V0DS
21
μ
PD720122
2.6.2
AC characteristics of BIU block with Function 1 selected
(1) CPU BUS read operation
Symbol
Parameter
Min.
Typ.
Max.
Unit
T1
Read cycle time
91
ns
T2
Address setup time (RDB
)
5
ns
T3
Chip select setup time (RDB
)
5
ns
T4
Buffer direction change time (RDB
)
14
ns
T5
Output data delay time (RDB
)
57
ns
T6
Read command width
57
ns
T7
Chip select hold time (RDB
)
5
ns
T8
Address hold time (RDB
)
5
ns
T9
RDB inactive time
34
ns
T10
Output data hold time (RDB
)
4
ns
Remark
It is assumed that the external pin capacitance is 15 pF (data bus = 50 pF).
CPU bus read timing
RDB
WRB
A7 to A1
D15 to D0
CSB
VALID
VALID
t
3
t
5
t
6
t
10
t
8
t
7
High level
INVALID
t
4
High level
t
1
t
9
t
2
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