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APPENDIX D REVISION HISTORY
User’s Manual U14492EJ5V0UD
824
(11/13)
Edition
Major Revision from Previous Edition
Applied to:
Addition of
Caution 2
to
6.3.1 (1) DMA source address registers 0H to 3H (DSA0H to
DSA3H)
Addition of
Caution 2
to
6.3.2 (1) DMA destination address registers
0H to 3H (DDA0H
to DDA3H)
Addition of
Cautions 1
and
2
to
6.3.3 DMA transfer count registers
0 to 3 (DBC0 to
DBC3)
Modification and addition of description to
Caution
in
6.3.5 DMA channel control
registers
0 to 3 (DCHC0 to DCHC3)
Deletion of
Note
from
Table 6-2 External Bus Cycles During DMA Transfer (Two-Cycle
Transfer)
Modification of description in
6.9 Next Address Setting Function
and addition of
Note
Addition of
Cautions 1
and
2
to
6.10 DMA Transfer Start Factors
Addition of
6.13.1 Restrictions related to DMA transfer forcible termination
Modification of description in
6.14 Times Related to DMA Transfer
Addition of
6.15 (5) Restrictions related to automatic clearing of TCn bit of DCHCn
register
and
(6) Read values of DSAn and DDAn registers
CHAPTER 6 DMA
FUNCTIONS (DMA
CONTROLLER)
Modification of description in
CHAPTER 7
INTERRUPT/EXCEPTION PROCESSING
FUNCTION
CHAPTER 7
INTERRUPT/
EXCEPTION
PROCESSING
FUNCTION
Addition of
Caution 2
to
9.1.5 (2) PWM mode 0: Triangular wave modulation (right-left
symmetric waveform control)
Addition of
Notes 1
and
2
to
9.2.4 (1) Timer 1/timer 2 clock selection register (PRM02)
Addition of
Notes 1
and
2
to
9.3.4 (1) Timer 1/timer 2 clock selection register (PRM02)
Addition of
Notes 1
and
2
to
9.3.4 (3) Timer 2 count clock/control edge selection
register 0 (CSE0)
Addition of
9.3.6 PWM output operation when timer 2 operates in compare mode
Modification of description in
Figure 9-92 TM3 Compare Operation Example (Set/Reset
Output Mode)
CHAPTER 9
TIMER/COUNTER
FUNCTION (REAL-
TIME PULSE UNIT)
Addition of
Caution 2
to
10.2.3 (1) Asynchronous serial interface mode register
(ASIM0)
Addition of
Caution
to
10.2.5 (3) Continuous transmission operation
Addition of description of transfer rate to
10.3.1
Features
Modification of description in
Cautions 1
and
2
in
10.3.3 (1)
Asynchronous serial
interface mode registers
10, 20 (ASIM10, ASIM20)
Addition of
Caution 3
to
10.3.7 (2) (c) Prescaler compare registers 1, 2 (PRSCM1,
PRSCM2)
4th
edition
Modification of description in
Table 10-8 Baud Rate Generator Setting Data
(BRG =
f
XX
/2)
CHAPTER 10
SERIAL
INTERFACE
FUNCTION