CHAPTER 13 RESET FUNCTION
597
User’s Manual U15195EJ5V0UD
Table 13-2. Initial Values of CPU, Internal RAM, and On-Chip Peripheral I/O After Reset (4/5)
On-Chip Hardware
Register Name
Initial Value After Reset
Valid edge selection register (SESC)
00H
Timer 3 clock selection register (PRM03)
00H
Timer 3 noise elimination time selection register (NRC3)
00H
Timer 3
Timer 3 output control register (TOC3)
00H
Timer 4 (TM4)
0000H
Compare register 4 (CM4)
0000H
Timer 4
Timer control register 4 (TMC4)
00H
Clocked serial interface mode register n (CSIMn) (n = 0,1)
00H
Clocked serial interface clock selection register n (CSICn) (n = 0,1)
00H
Clocked serial interface receive buffer register n (SIRBn) (n = 0,1)
0000H
Clocked serial interface receive buffer register Ln (SIRBLn) (n = 0, 1)
00H
Clocked serial interface transmit buffer register n (SOTBn) (n = 0,1)
0000H
Clocked serial interface transmit buffer register Ln (SOTBLn) (n = 0,
1)
00H
Clocked serial interface read-only receive buffer register n (SIRBEn) (n
= 0,1)
0000H
Clocked serial interface read-only receive buffer register Ln
(SIRBELn) (n = 0, 1)
00H
Clocked serial interface first stage transmit buffer register n (SOTBFn)
(n = 0,1)
0000H
Clocked serial interface first stage transmit buffer register Ln
(SOTBFLn) (n = 0, 1)
00H
Serial I/O shift register n (SIOn) (n = 0,1)
0000H
Serial I/O shift register Ln (SIOLn) (n = 0, 1)
00H
Prescaler mode register 3 (PRSM3)
00H
Serial interface
function (CSI0,
CSI1)
Prescaler compare register 3 (PRSCM3)
00H
Asynchronous serial interface mode register 0 (ASIM0)
01H
Receive buffer register 0 (RXB0)
FFH
Asynchronous serial interface status register 0 (ASIS0)
00H
Transmit buffer register 0 (TXB0)
FFH
Asynchronous serial interface transmit status register 0 (ASIF0)
00H
Baud rate generator control register 0 (BRGC0)
FFH
Serial interface
function
(UART0)
Clock selection register 0 (CKSR0)
00H
Asynchronous serial interface mode register 10 (ASIM10)
81H
Asynchronous serial interface mode register 11 (ASIM11)
00H
Asynchronous serial interface status register 1 (ASIS1)
00H
2-frame consecutive receive buffer register 1 (RXB1)
Undefined
Receive buffer register L1 (RXBL1)
Undefined
2-frame consecutive transmit shift register 1 (TXS1)
Undefined
On-chip
peripheral
I/O
Serial interface
function
(UART1)
Transmit shift register L1 (TXSL1)
Undefined