參數(shù)資料
型號: UPD70F3107AA
廠商: NEC Corp.
英文描述: 32-Bit Single-Chip Microcontrollers
中文描述: 32位單芯片微控制器
文件頁數(shù): 52/99頁
文件大小: 528K
代理商: UPD70F3107AA
CHAPTER 3 SPECIFICATIONS OF PCI HOST BRIDGE MACRO
Application Note U17121EJ1V1AN
52
(d) Data parity error
Timing type: Single read & write cycle data parity error
Figure 3-15. Data Parity Error
AD
DEVSEL#
TRDY#
PAR
FRAME#
STOP#
IRDY#
PCICLK
PERR#
H
(2) PCI bus slave cycle timing
The timing of access from the PCI device to SDRAM is shown below.
(a) Memory single read cycle
Timing type: Memory single read cycle
Figure 3-16. Single Read Cycle
AD
DEVSEL#
TRDY#
REQ#
FRAME#
STOP#
IRDY#
PCICLK
GNT#
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