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參數(shù)資料
| 型號(hào)： | UPD4702G |
| 廠商： | NEC Corp. |
| 元件分類： | 通用總線功能 |
| 英文描述： | INCREMENTAL ENCODER 8-BIT UP/DOWN COUNTER CMOS INTEGRATED CIRCUITS |
| 中文描述： | 增量式編碼器8位加/減計(jì)數(shù)器CMOS集成電路 |
| 文件頁數(shù)： | 1/16頁 |
| 文件大?。?/td> | 167K |
| 代理商： | UPD4702G |
DESCRIPTION
The
μ
PD4702 is 8-bit up/down counters for an incremental encoder. Two-phase (A, B) incremental input signals
are phase-differentiated, and on each signal edge, an up-count is executed if the A phase is leading, or a down-count
if the B phase is leading. Eight-bit count data is output in real time. A carry output and borrow output are also
provided for counter overflow and underflow.
The
μ
PD4704 is also available; use of these enables the count width to be extended.
1994
DATA SHEET
INCREMENTAL ENCODER 8-BIT UP/DOWN COUNTER
CMOS INTEGRATED CIRCUITS
μ
PD4702
MOS INTEGRATED CIRCUIT
FEATURES
Incremental inputs (A, B)
On-chip phase discrimination circuit (up-count mode
when the phase order is A
→
B, down-count mode
when B
→
A) 4-multiplication count method
On-chip edge detection circuit
8-bit up/down counter latch output o Carry output,
borrow output
Count data output controllable (3-state output)
CMOS, single +5 V power supply
ORDERING INFORMATION
Part Number
Package
μ
PD4702C
20-pin plastic DIP
(300 mil)
μ
PD4702G
20-pin plastic SOP
(300 mil)
1
2
3
4
5
6
7
8
9
10
Reset
A
B
NC
CD
0
CD
1
CD
2
CD
3
NC
V
SS
V
DD
Carry
Borrow
STB
OE
CD
7
CD
6
CD
5
CD
4
NC
20
19
18
17
16
15
14
13
12
11
PIN CONFIGURATION (Top View)
PIN NAMES
A
B
Reset
STB
OE
CD
0-7
Carry
Borrow : Borrow pulse output
2-phase incremental signal inputs
: Counter reset input
: Latch strobe signal input
: Output control signal input
: Count data outputs
: Carry pulse output
Document No.
(O. D. No.
Date Published April 1997 P
Printed in Japan
IC-3304A (2nd edition)
IC-5403A)
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